loadpatents
name:-0.0092489719390869
name:-0.0084390640258789
name:-0.00057411193847656
Neff; Robert M. R. Patent Filings

Neff; Robert M. R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Neff; Robert M. R..The latest application filed is for "input/output (i/o) interface for high-speed data converters".

Company Profile
0.6.8
  • Neff; Robert M. R. - Palo Alto CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Input/output (I/O) interface for high-speed data converters
App 20070002893 - Neff; Robert M. R. ;   et al.
2007-01-04
System and method for timing calibration of time-interleaved data converters
Grant 7,148,828 - Fernandez , et al. December 12, 2
2006-12-12
System And Method For Timing Calibration Of Time-interleaved Data Converters
App 20060250288 - Fernandez; Andrew D. ;   et al.
2006-11-09
Interleaved clock signal generator having serial delay and ring counter architecture
Grant 6,956,423 - Neff October 18, 2
2005-10-18
Power consumption stabilization system and method
Grant 6,933,862 - Neff August 23, 2
2005-08-23
CMOS controlled-impedance transmission line driver
Grant 6,909,310 - Poulton , et al. June 21, 2
2005-06-21
Power consumption stabilization system & method
App 20050078016 - Neff, Robert M. R.
2005-04-14
System and method using self-synchronized scrambling for reducing coherent interference
App 20050047512 - Neff, Robert M. R. ;   et al.
2005-03-03
Tunable differential transconductor and adjustment method
App 20050007160 - Neff, Robert M. R.
2005-01-13
CMOS controlled-impedance transmission line driver
App 20040150432 - Poulton, Kenneth D. ;   et al.
2004-08-05
Method of calibrating an analog-to-digital converter and a circuit implementing the same
Grant 6,720,895 - Poulton , et al. April 13, 2
2004-04-13
Analog-to-digital converter with on-chip memory
Grant 6,707,411 - Poulton , et al. March 16, 2
2004-03-16
Interleaved clock signal generator having serial delay and ring counter architecture
App 20030151441 - Neff, Robert M.R.
2003-08-14
Method Of Calibrating An Analog-to-digital Converter And A Circuit Implementing The Same
App 20030146861 - Poulton, Kenneth D. ;   et al.
2003-08-07

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