Neely; Eric D.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Neely; Eric D..The latest application filed is for "input buffer circuit having sleep mode and bus hold function".
- Neely; Eric D. - Mesa AZ
- Neely; Eric D. - Phoenix AZ
| Patent | Date |
|---|---|
| Input buffer circuit having sleep mode and bus hold function Grant 5,432,462 - Obregon , et al. July 11, 1 | 1995-07-11 |
| Three state gate having enhanced transition to an active low Grant 4,486,674 - Neely December 4, 1 | 1984-12-04 |
| Enable gate for 3 state circuits Grant 4,467,223 - Neely August 21, 1 | 1984-08-21 |
| Glitch eliminating data selector Grant 4,424,455 - Neely January 3, 1 | 1984-01-03 |
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