Nedalgi; Dharmaray M.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Nedalgi; Dharmaray M..The latest application filed is for "state definition and retention circuit".
- Nedalgi; Dharmaray M. - Bangalore IN
- Nedalgi; Dharmaray M - Bangalore IN
- Nedalgi; Dharmaray M. - Eindhoven IN
| Patent | Date |
|---|---|
| State definition and retention circuit Grant 8,629,692 - Ubaradka , et al. January 14, 2 | 2014-01-14 |
| State Definition And Retention Circuit App 20140002134 - UBARADKA; JAYARAMA ; et al. | 2014-01-02 |
| Electronic device with a high voltage tolerant unit Grant 8,330,491 - Nedalgi December 11, 2 | 2012-12-11 |
| High voltage tolerant bus holder circuit and method of operating the circuit Grant 8,283,947 - Ubaradka , et al. October 9, 2 | 2012-10-09 |
| Low-swing CMOS input circuit Grant 7,969,191 - Nedalgi June 28, 2 | 2011-06-28 |
| Low-swing Cmos Input Circuit App 20110006810 - Nedalgi; Dharmaray M. | 2011-01-13 |
| Electronic circuit Grant 7,741,874 - Nedalgi June 22, 2 | 2010-06-22 |
| Electronic Device With A High Voltage Tolerant Unit App 20100085080 - Nedalgi; Dharmaray M. | 2010-04-08 |
| Electronic Circuit App 20090261860 - Nedalgi; Dharmaray M. | 2009-10-22 |
| Constant Voltage Generating Device App 20090189643 - Nedalgi; Dharmaray M. | 2009-07-30 |
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