Nayyar; Raman

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nayyar; Raman.The latest application filed is for "method and apparatus for memory write performance optimization in architectures with out-of-order read/request-for-ownership response".

Company Profile

0.6.8

Nayyar; Raman - Hillsboro OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for memory write performance optimization in architectures with out-of-order read/request-for-ownership response Grant 8,990,456 - Nayyar , et al. March 24, 2	2015-03-24
Method and Apparatus for Memory Write Performance Optimization in Architectures with Out-of-Order Read/Request-for-Ownership Response App 20150006825 - Nayyar; Raman ; et al.	2015-01-01
Method and Apparatus for Memory Write Performance Optimization in Architectures with Out-of-Order Read/Request-for-Ownership Response App 20130212336 - Nayyar; Raman ; et al.	2013-08-15
Method and apparatus for memory write performance optimization in architectures with out-of-order read/request-for-ownership response Grant 8,341,360 - Nayyar , et al. December 25, 2	2012-12-25
Method and Apparatus for Exploiting Parallelism Across Multiple Traffic Streams Through a Single Channel App 20090254714 - Nayyar; Raman ; et al.	2009-10-08
Method and apparatus for exploiting parallelism across multiple traffic streams through a single channel Grant 7,562,194 - Nayyar , et al. July 14, 2	2009-07-14
Transaction flow and ordering for a packet processing engine, located within an input-output hub Grant 7,487,284 - Kapur , et al. February 3, 2	2009-02-03
Transaction flow and ordering for a packet processing engine, located within an input-output hub App 20080025289 - Kapur; Suvansh Krishan ; et al.	2008-01-31
System and method for thermal throttling of memory modules Grant 7,318,130 - Morrow , et al. January 8, 2	2008-01-08
Method and apparatus for exploiting parallelism across multiple traffic streams through a single channel App 20070186060 - Nayyar; Raman ; et al.	2007-08-09
Method and apparatus for memory write performance optimization in architectures with out-of-order read/request-for-ownership response App 20070156980 - Nayyar; Raman ; et al.	2007-07-05
System and method for thermal throttling of memory modules App 20050289292 - Morrow, Warren R. ; et al.	2005-12-29
Graphics address relocation table (GART) stored entirely in a local memory of an input/output expansion bridge for input/output (I/O) address translation Grant 6,618,770 - Nayyar , et al. September 9, 2	2003-09-09
Input/output (I/O) address translation in a bridge proximate to a local I/O bus App 20020129187 - Nayyar, Raman ; et al.	2002-09-12

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