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Patent applications and USPTO patent grants for Naylor, Jr.; William Clark.The latest application filed is for "placement-based congestion-aware logic restructuring".
Patent | Date |
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Boolean satisfiability (SAT) solver Grant 10,650,109 - Naylor, Jr. | 2020-05-12 |
Placement-based congestion-aware logic restructuring Grant 10,346,578 - Patel , et al. July 9, 2 | 2019-07-09 |
Optimizing the ordering of the inputs to large commutative-associative trees of logic gates Grant 10,331,834 - Craciun , et al. | 2019-06-25 |
Placement-based Congestion-aware Logic Restructuring App 20180121591 - Patel; Jagat B. ;   et al. | 2018-05-03 |
Optimizing The Ordering Of The Inputs To Large Commutative-Associative Trees Of Logic Gates App 20180004862 - Craciun; Bogdan ;   et al. | 2018-01-04 |
Placing cells of an IC design using partition preconditioning Grant 6,951,003 - Barbee, III , et al. September 27, 2 | 2005-09-27 |
Color display system Grant 5,844,532 - Silverbrook , et al. December 1, 1 | 1998-12-01 |
Intermingling subpixels in discrete level displays Grant 5,805,136 - Silverbrook , et al. September 8, 1 | 1998-09-08 |
Color conversion method Grant 5,801,854 - Naylor, Jr. September 1, 1 | 1998-09-01 |
Noise quenching method and apparatus for a colour display system Grant 5,757,516 - Naylor, Jr. May 26, 1 | 1998-05-26 |
Display pixel balancing for a multi color discrete level display Grant 5,751,272 - Silverbrook , et al. May 12, 1 | 1998-05-12 |
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