loadpatents
name:-0.026442050933838
name:-0.039172887802124
name:-0.021584987640381
Nayak; Anup Patent Filings

Nayak; Anup

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nayak; Anup.The latest application filed is for "method and apparatus to save power in usb repeaters/re-timers".

Company Profile
21.35.20
  • Nayak; Anup - Fremont CA
  • Nayak; Anup - Potomac MD
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method And Apparatus To Save Power In Usb Repeaters/re-timers
App 20220283624 - Bajpai; Pradeep Kumar ;   et al.
2022-09-08
USB type-C signal interface circuit
Grant 11,416,054 - Nayak , et al. August 16, 2
2022-08-16
Power supply architecture for USB-C controllers
Grant 11,372,468 - Bodnaruk , et al. June 28, 2
2022-06-28
Process Risk Calculation Based On Hardness Of Attack Paths
App 20220131894 - Hassanzadeh; Amin ;   et al.
2022-04-28
Generating Attack Graphs In Agile Security Platforms
App 20220129590 - Hadar; Eitan ;   et al.
2022-04-28
Generating attack graphs in agile security platforms
Grant 11,277,432 - Hassanzadeh , et al. March 15, 2
2022-03-15
Criticality analysis of attack graphs
Grant 11,252,175 - Hassanzadeh , et al. February 15, 2
2022-02-15
Generating attack graphs in agile security platforms
Grant 11,232,235 - Hadar , et al. January 25, 2
2022-01-25
Startup regulator using voltage buffer to stabilize power supply voltage
Grant 11,133,740 - Lee , et al. September 28, 2
2021-09-28
Programmable gate driver control in USB power delivery
Grant 11,101,673 - Mattos , et al. August 24, 2
2021-08-24
Power Supply Architecture For Usb-c Controllers
App 20210240249 - Bodnaruk; Nicholas Alexander ;   et al.
2021-08-05
Startup Regulator Using Voltage Buffer To Stabilize Power Supply Voltage
App 20210194376 - Lee; Myeongseok ;   et al.
2021-06-24
USB type-C sideband signal interface circuit
Grant 10,990,560 - Khamesra , et al. April 27, 2
2021-04-27
Usb Type-c Signal Interface Circuit
App 20210089100 - Nayak; Anup ;   et al.
2021-03-25
Self-biased gate driver architecture
Grant 10,944,330 - Lee , et al. March 9, 2
2021-03-09
Power supply architecture for USB-C controllers
Grant 10,901,487 - Bodnaruk , et al. January 26, 2
2021-01-26
USB type-c signal interface circuit
Grant 10,809,787 - Nayak , et al. October 20, 2
2020-10-20
Configurable and power-optimized integrated gate-driver for USB power-delivery and type-C SoCs
Grant 10,802,571 - Nayak , et al. October 13, 2
2020-10-13
USB power control analog subsystem architecture
Grant 10,788,875 - Mattos , et al. September 29, 2
2020-09-29
Power Supply Architecture For Usb-c Controllers
App 20200174546 - Bodnaruk; Nicholas Alexander ;   et al.
2020-06-04
Generating Attack Graphs In Agile Security Platforms
App 20200177618 - Hassanzadeh; Amin ;   et al.
2020-06-04
Generating Attack Graphs In Agile Security Platforms
App 20200175175 - Hadar; Eitan ;   et al.
2020-06-04
Criticality Analysis Of Attack Graphs
App 20200137104 - Hassanzadeh; Amin ;   et al.
2020-04-30
Programmable VBUS discharge in USB power delivery
Grant 10,599,597 - Mattos , et al.
2020-03-24
Usb Type-c Sideband Signal Interface Circuit
App 20190391950 - Khamesra; Arun ;   et al.
2019-12-26
Power supply architecture for USB-C controllers
Grant 10,503,240 - Bodnaruk , et al. Dec
2019-12-10
Power Supply Architecture For Usb-c To Support Active Cable And Dfp/ufp/drp Applications
App 20190354163 - Bodnaruk; Nicholas Alexander ;   et al.
2019-11-21
Usb Type-c Signal Interface Circuit
App 20190317582 - Nayak; Anup ;   et al.
2019-10-17
USB Power Control Analog Subsystem Architecture
App 20190294226 - Mattos; Derwin W. ;   et al.
2019-09-26
Programmable Gate Driver Control In Usb Power Delivery
App 20190288532 - Mattos; Derwin ;   et al.
2019-09-19
Configurable And Power-optimized Integrated Gate-driver For Usb Power-delivery And Type-c Socs
App 20190278360 - Nayak; Anup ;   et al.
2019-09-12
Programmable Vbus Discharge In Usb Power Delivery
App 20190278731 - Mattos; Derwin ;   et al.
2019-09-12
USB type-C sideband signal interface circuit
Grant 10,353,853 - Khamesra , et al. July 16, 2
2019-07-16
USB type-C signal interface circuit
Grant 10,338,656 - Nayak , et al.
2019-07-02
Configurable and power-optimized integrated gate-driver for USB power-delivery and type-C SoCs
Grant 10,254,820 - Nayak , et al.
2019-04-09
USB power control analog subsystem architecture
Grant 10,228,742 - Mattos , et al.
2019-03-12
USB Power Control Analog Subsystem Architecture
App 20180335818 - Mattos; Derwin W. ;   et al.
2018-11-22
Configurable And Power-optimized Integrated Gate-driver For Usb Power-delivery And Type-c Socs
App 20170351320 - Nayak; Anup ;   et al.
2017-12-07
Configurable and power-optimized integrated gate-driver for USB power-delivery and type-C SoCs
Grant 9,727,123 - Nayak , et al. August 8, 2
2017-08-08
Low power USB 2.0 subsystem
Grant 9,122,288 - Nayak , et al. September 1, 2
2015-09-01
Architectures for supporting communication and access between multiple host devices and one or more common functions
Grant 8,090,894 - Khodabandehlou , et al. January 3, 2
2012-01-03
Circuit and method for dynamic in-rush current control in a power management circuit
Grant 8,074,086 - Sancheti , et al. December 6, 2
2011-12-06
Configurable power controller
Grant 7,863,971 - Nayak , et al. January 4, 2
2011-01-04
Method and device for selecting one of multiple clock signals based on frequency differences of such clock signals
Grant 7,343,510 - Ross , et al. March 11, 2
2008-03-11
Asynchronous arbiter with bounded resolution time and predictable output state
Grant 7,225,283 - Nayak , et al. May 29, 2
2007-05-29
System and method for staging concurrent accesses to a memory address location via a single port using a high speed sampling clock
Grant 7,184,359 - Bridgewater , et al. February 27, 2
2007-02-27
Circuit for generating silicon ID for PLDS
Grant 6,922,820 - Lulla , et al. July 26, 2
2005-07-26
Method and system for generating a bit order data structure of configuration bits from a schematic hierarchy
Grant 6,904,436 - Merchant , et al. June 7, 2
2005-06-07
JTAG instruction register and decoder for PLDS
Grant 6,804,802 - Lulla , et al. October 12, 2
2004-10-12
Architecture and logic to control a device without a JTAG port through a device with a JTAG port
Grant 6,757,844 - Lulla , et al. June 29, 2
2004-06-29
PLD configuration port architecture and logic
Grant 6,748,456 - Stanton , et al. June 8, 2
2004-06-08
Macro-cell flip-flop with scan-in input
Grant 6,687,864 - Nayak , et al. February 3, 2
2004-02-03
Integrated mirror array and circuit device
App 20020131146 - Gee, Dale A. ;   et al.
2002-09-19
Programmable interconnect matrix architecture for complex programmable logic device
Grant 6,137,308 - Nayak October 24, 2
2000-10-24

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