loadpatents
name:-0.0086770057678223
name:-0.016096830368042
name:-0.0021510124206543
Naveh; Ishai Patent Filings

Naveh; Ishai

Patent Applications and Registrations

Patent applications and USPTO patent grants for Naveh; Ishai.The latest application filed is for "read latency reduction in a memory device".

Company Profile
2.20.8
  • Naveh; Ishai - San Jose CA
  • Naveh; Ishai - Migdal Haemek IL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Reference circuits and methods for resistive memories
Grant 10,984,861 - Naveh , et al. April 20, 2
2021-04-20
Read latency reduction in a memory device
Grant 10,726,888 - Intrater , et al.
2020-07-28
Read Latency Reduction In A Memory Device
App 20190237118 - Intrater; Gideon ;   et al.
2019-08-01
Read latency reduction in a memory device
Grant 10,290,334 - Intrater , et al.
2019-05-14
Read Latency Reduction In A Memory Device
App 20180025761 - Intrater; Gideon ;   et al.
2018-01-25
Read latency reduction in a memory device
Grant 9,812,183 - Intrater , et al. November 7, 2
2017-11-07
Read Latency Reduction In A Memory Device
App 20170256297 - Intrater; Gideon ;   et al.
2017-09-07
Methods of making memory devices with programmable impedance elements and vertically formed access devices
Grant 9,755,142 - Naveh September 5, 2
2017-09-05
Read operations and circuits for memory devices having programmable elements, including programmable resistance elements
Grant 9,570,166 - Gilbert , et al. February 14, 2
2017-02-14
Prototyping integrated circuit devices with programmable impedance elements
Grant 9,373,398 - Naveh June 21, 2
2016-06-21
Circuits having programmable impedance elements and vertical access devices
Grant 9,343,667 - Naveh May 17, 2
2016-05-17
Circuits and methods having programmable impedance elements
Grant 8,947,913 - Derhacobian , et al. February 3, 2
2015-02-03
Read operations and circuits for memory devices having programmable elements, including programmable resistance elements
Grant 8,913,444 - Gilbert , et al. December 16, 2
2014-12-16
Memory devices, circuits and, methods that apply different electrical conditions in access operations
Grant 8,902,631 - Sunkavalli , et al. December 2, 2
2014-12-02
Circuits having programmable impedance elements
Grant 8,687,403 - Derhacobian , et al. April 1, 2
2014-04-01
Integrated circuit devices and systems having programmable impedance elements with different response types
Grant 8,675,396 - Derhacobian , et al. March 18, 2
2014-03-18
Memory Devices, Circuits And, Methods That Apply Different Electrical Conditions In Access Operations
App 20140063902 - Sunkavalli; Ravi ;   et al.
2014-03-06
Asymmetric single poly NMOS non-volatile memory cell
Grant 7,948,020 - Roizin , et al. May 24, 2
2011-05-24
Asymmetric single poly NMOS non-volatile memory cell
Grant 7,800,156 - Roizin , et al. September 21, 2
2010-09-21
Asymmetric Single Poly NMOS Non-Volatile Memory Cell
App 20100172184 - Roizin; Yakov ;   et al.
2010-07-08
Asymmetric Single Poly NMOS Non-Volatile Memory Cell
App 20100027346 - Roizin; Yakov ;   et al.
2010-02-04
Asymmetric Single Poly NMOS Non-Volatile Memory Cell
App 20090212342 - Roizin; Yakov ;   et al.
2009-08-27
Company Registrations
SEC0001654636Naveh Ishai

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