loadpatents
Patent applications and USPTO patent grants for NARESH; Nikita.The latest application filed is for "scan chain self-testing of lockstep cores on reset".
Patent | Date |
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Scan Chain Self-testing Of Lockstep Cores On Reset App 20210055345 - NARAYANAN; Prakash ;   et al. | 2021-02-25 |
Scan chain self-testing of lockstep cores on reset Grant 10,866,280 - Narayanan , et al. December 15, 2 | 2020-12-15 |
Testing Read-only Memory Using Memory Built-in Self-test Controller App 20200388346 - NARAYANAN; Prakash ;   et al. | 2020-12-10 |
Testing read-only memory using memory built-in self-test controller Grant 10,818,374 - Narayanan , et al. October 27, 2 | 2020-10-27 |
Scan Chain Self-testing Of Lockstep Cores On Reset App 20200309851 - NARAYANAN; Prakash ;   et al. | 2020-10-01 |
Testing Read-only Memory Using Memory Built-in Self-test Controller App 20200135290 - NARAYANAN; Prakash ;   et al. | 2020-04-30 |
Area efficient parallel test data path for embedded memories Grant 10,460,821 - Narayanan , et al. Oc | 2019-10-29 |
Area Efficient Parallel Test Data Path For Embedded Memories App 20180174663 - Narayanan; Prakash ;   et al. | 2018-06-21 |
Area efficient parallel test data path for embedded memories Grant 9,899,103 - Narayanan , et al. February 20, 2 | 2018-02-20 |
Area Efficient Parallel Test Data Path For Embeded Memories App 20170157524 - Narayanan; Prakash ;   et al. | 2017-06-08 |
Area-efficient Parallel Test Data Path For Embedded Memories App 20170125125 - Narayanan; Prakash ;   et al. | 2017-05-04 |
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