Narayanaswami; R. Shekhar
Patent Applications and Registrations
Patent applications and USPTO patent grants for Narayanaswami; R. Shekhar.The latest application filed is for "methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolation".
- Narayanaswami; R. Shekhar - Palo Alto CA
| Patent | Date |
|---|---|
| Methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolation Grant 7,436,229 - Sidiropoulos , et al. October 14, 2 | 2008-10-14 |
| Methods and apparatus for frequency synthesis with feedback interpolation Grant 7,432,750 - Sidiropoulos , et al. October 7, 2 | 2008-10-07 |
| Methods and apparatus for generating multiple clocks using feedback interpolation Grant 7,323,916 - Sidiropoulos , et al. January 29, 2 | 2008-01-29 |
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