loadpatents
name:-0.14523410797119
name:-0.10974597930908
name:-0.023450136184692
NARAYANAN; PRAKASH Patent Filings

NARAYANAN; PRAKASH

Patent Applications and Registrations

Patent applications and USPTO patent grants for NARAYANAN; PRAKASH.The latest application filed is for "transistion fault testing of funtionally asynchronous paths in an integrated circuit".

Company Profile
23.33.44
  • NARAYANAN; PRAKASH - BANGALORE IN
  • Narayanan; Prakash - Karnataka IN
  • Narayanan; Prakash - Karanataka IN
  • NARAYANAN; Prakash - Bengaluru IN
  • Narayanan; Prakash - Columbia MD
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistion Fault Testing Of Funtionally Asynchronous Paths In An Integrated Circuit
App 20220196738 - NARAYANAN; PRAKASH ;   et al.
2022-06-23
Transistion fault testing of funtionally asynchronous paths in an integrated circuit
Grant 11,300,615 - Narayanan , et al. April 12, 2
2022-04-12
Delay Fault Testing Of Pseudo Static Controls
App 20220091919 - Acharya; Aravinda ;   et al.
2022-03-24
Multiple input signature register analysis for digital circuitry
Grant 11,209,481 - Maheshwari , et al. December 28, 2
2021-12-28
Delay fault testing of pseudo static controls
Grant 11,194,645 - Acharya , et al. December 7, 2
2021-12-07
False path timing exception handler circuit
Grant 11,194,944 - Pradeep , et al. December 7, 2
2021-12-07
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20210364569 - Narayanan; Prakash ;   et al.
2021-11-25
Dynamic Generation Of Atpg Mode Signals For Testing Multipath Memory Circuit
App 20210318378 - PRADEEP; WILSON ;   et al.
2021-10-14
Phase Controlled Codec Block Scan Of A Partitioned Circuit Device
App 20210311121 - NARAYANAN; Prakash ;   et al.
2021-10-07
Functional circuitry, decompressor circuitry, scan circuitry, masking circuitry, qualification circuitry
Grant 11,119,152 - Narayanan , et al. September 14, 2
2021-09-14
Path Based Controls For Ate Mode Testing Of Multicell Memory Circuit
App 20210278459 - PRADEEP; WILSON ;   et al.
2021-09-09
Dynamic generation of ATPG mode signals for testing multipath memory circuit
Grant 11,073,553 - Pradeep , et al. July 27, 2
2021-07-27
Phase controlled codec block scan of a partitioned circuit device
Grant 11,073,557 - Narayanan , et al. July 27, 2
2021-07-27
Full Pad Coverage Boundary Scan
App 20210215757 - Narayanan; Prakash ;   et al.
2021-07-15
Path based controls for ATE mode testing of multicell memory circuit
Grant 11,047,910 - Pradeep , et al. June 29, 2
2021-06-29
Full pad coverage boundary scan
Grant 10,983,161 - Narayanan , et al. April 20, 2
2021-04-20
Scan Chain Self-testing Of Lockstep Cores On Reset
App 20210055345 - NARAYANAN; Prakash ;   et al.
2021-02-25
Scan chain self-testing of lockstep cores on reset
Grant 10,866,280 - Narayanan , et al. December 15, 2
2020-12-15
Testing Read-only Memory Using Memory Built-in Self-test Controller
App 20200388346 - NARAYANAN; Prakash ;   et al.
2020-12-10
False Path Timing Exception Handler Circuit
App 20200372197 - PRADEEP; WILSON ;   et al.
2020-11-26
Phase Controlled Codec Block Scan Of A Partitioned Circuit Device
App 20200355744 - NARAYANAN; Prakash ;   et al.
2020-11-12
Testing read-only memory using memory built-in self-test controller
Grant 10,818,374 - Narayanan , et al. October 27, 2
2020-10-27
Scan Chain Self-testing Of Lockstep Cores On Reset
App 20200309851 - NARAYANAN; Prakash ;   et al.
2020-10-01
False path timing exception handler circuit
Grant 10,776,546 - Pradeep , et al. September 15, 2
2020-09-15
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20200174069 - Narayanan; Prakash ;   et al.
2020-06-04
Delay Fault Testing Of Pseudo Static Controls
App 20200142768 - Acharya; Aravinda ;   et al.
2020-05-07
Testing Read-only Memory Using Memory Built-in Self-test Controller
App 20200135290 - NARAYANAN; Prakash ;   et al.
2020-04-30
Compressed scan chains with three input mask gates and registers
Grant 10,591,540 - Narayanan , et al.
2020-03-17
Delay fault testing of pseudo static controls
Grant 10,579,454 - Acharya , et al.
2020-03-03
Area efficient parallel test data path for embedded memories
Grant 10,460,821 - Narayanan , et al. Oc
2019-10-29
False Path Timing Exception Handler Circuit
App 20190266303 - PRADEEP; WILSON ;   et al.
2019-08-29
Full Pad Coverage Boundary Scan
App 20190235020 - Narayanan; Prakash ;   et al.
2019-08-01
Path Based Controls For Ate Mode Testing Of Multicell Memory Circuit
App 20190204382 - PRADEEP; WILSON ;   et al.
2019-07-04
Transistion Fault Testing Of Funtionally Asynchronous Paths In An Integrated Circuit
App 20190204387 - NARAYANAN; PRAKASH ;   et al.
2019-07-04
Dynamic Generation Of Atpg Mode Signals For Testing Multipath Memory Circuit
App 20190206507 - PRADEEP; WILSON ;   et al.
2019-07-04
False path timing exception handler circuit
Grant 10,331,826 - Pradeep , et al.
2019-06-25
Full pad coverage boundary scan
Grant 10,274,538 - Narayanan , et al.
2019-04-30
Multiple Input Signature Register Analysis For Digital Circuitry
App 20190113566 - MAHESHWARI; NAMAN ;   et al.
2019-04-18
Multiple input signature register analysis for digital circuitry
Grant 10,184,980 - Maheshwari , et al. Ja
2019-01-22
Delay Fault Testing Of Pseudo Static Controls
App 20180307553 - ACHARYA; ARAVINDA ;   et al.
2018-10-25
False Path Timing Exception Handler Circuit
App 20180307788 - PRADEEP; WILSON ;   et al.
2018-10-25
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20180210030 - Narayanan; Prakash ;   et al.
2018-07-26
Area Efficient Parallel Test Data Path For Embedded Memories
App 20180174663 - Narayanan; Prakash ;   et al.
2018-06-21
Compressed scan chains with three input mask gates and registers
Grant 9,952,283 - Narayanan , et al. April 24, 2
2018-04-24
Multiple Input Signature Register Analysis For Digital Circuitry
App 20180067164 - MAHESHWARI; NAMAN ;   et al.
2018-03-08
Area efficient parallel test data path for embedded memories
Grant 9,899,103 - Narayanan , et al. February 20, 2
2018-02-20
Full Pad Coverage Boundary Scan
App 20180045778 - Narayanan; Prakash ;   et al.
2018-02-15
On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems
Grant 9,823,282 - Narayanan , et al. November 21, 2
2017-11-21
Full Pad Coverage Boundary Scan
App 20170315174 - Narayanan; Prakash ;   et al.
2017-11-02
Full pad coverage boundary scan
Grant 9,791,505 - Narayanan , et al. October 17, 2
2017-10-17
Area Efficient Parallel Test Data Path For Embeded Memories
App 20170157524 - Narayanan; Prakash ;   et al.
2017-06-08
Area-efficient Parallel Test Data Path For Embedded Memories
App 20170125125 - Narayanan; Prakash ;   et al.
2017-05-04
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20160069958 - Narayanan; Prakash ;   et al.
2016-03-10
Self-test Methods And Systems For Digital Circuits
App 20160003900 - Narayanan; Prakash ;   et al.
2016-01-07
Decompressed scan chain masking circuit shift register with log2(n/n) cells
Grant 9,229,055 - Narayanan , et al. January 5, 2
2016-01-05
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20150285860 - Narayanan; Prakash ;   et al.
2015-10-08
On-chip Ir Drop Detectors For Functional And Test Mode Scenarios, Circuits, Processes And Systems
App 20150276824 - Narayanan; Prakash ;   et al.
2015-10-01
Scan chain masking qualification circuit shift register and bit-field decoders
Grant 9,091,729 - Narayanan , et al. July 28, 2
2015-07-28
On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems
Grant 9,081,063 - Narayanan , et al. July 14, 2
2015-07-14
IC delaying flip-flop output partial clock cycle for equalizing current
Grant 9,053,273 - Poddutur , et al. June 9, 2
2015-06-09
Integrated circuits capable of generating test mode control signals for scan tests
Grant 8,972,807 - Mittal , et al. March 3, 2
2015-03-03
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20150006987 - Narayanan; Prakash ;   et al.
2015-01-01
Masking circuit removing unknown bit from cell in scan chain
Grant 8,887,018 - Narayanan , et al. November 11, 2
2014-11-11
Circuits and methods for dynamic allocation of scan test resources
Grant 8,839,063 - Parekhji , et al. September 16, 2
2014-09-16
Circuits And Methods For Dynamic Allocation Of Scan Test Resources
App 20140208177 - Parekhji; Rubin Ajit ;   et al.
2014-07-24
Apparatuses And Methods To Suppress Power Supply Noise Harmonics In Integrated Circuits
App 20140021993 - PODDUTUR; SUMANTH REDDY ;   et al.
2014-01-23
Integrated Circuits Capable Of Generating Test Mode Control Signals For Scan Tests
App 20130305106 - Mittal; Rajesh ;   et al.
2013-11-14
On-chip Ir Drop Detectors For Functional And Test Mode Scenarios, Circuits, Processes And Systems
App 20120126781 - Narayanan; Prakash ;   et al.
2012-05-24
Flip-flop Architecture For Mitigating Hold Closure
App 20120062298 - PODDUTUR; Sumanth Reddy ;   et al.
2012-03-15
Compressed Scan Chain Diagnosis By Internal Chain Observation, Processes, Circuits, Devices And Systems
App 20110307750 - Narayanan; Prakash ;   et al.
2011-12-15
Rack Systems And Assemblies For Fuel Storage
App 20110051883 - McInnes; Ian ;   et al.
2011-03-03

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