Narayan; Subramanian Jagdish
Patent Applications and Registrations
Patent applications and USPTO patent grants for Narayan; Subramanian Jagdish.The latest application filed is for "frequency detector and oscillator circuit".
- Narayan; Subramanian Jagdish - Bengaluru IN
- Narayan; Subramanian Jagdish - Bangalore IN
| Patent | Date |
|---|---|
| Dithering and calibration technique in multi-stage ADC Grant 10,763,886 - Narayan , et al. Sep | 2020-09-01 |
| Frequency detector and oscillator circuit Grant 9,602,084 - Narayan , et al. March 21, 2 | 2017-03-21 |
| Frequency Detector And Oscillator Circuit App 20160308516 - Narayan; Subramanian Jagdish ; et al. | 2016-10-20 |
| Adding predefined offset to coarse ADC residue output to SAR Grant 9,148,166 - Narayan , et al. September 29, 2 | 2015-09-29 |
| Novel Technique To Combine A Coarse Adc And A Sar Adc App 20150188561 - Narayan; Subramanian Jagdish ; et al. | 2015-07-02 |
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