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name:-0.007918119430542
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Narasimha; Usha Patent Filings

Narasimha; Usha

Patent Applications and Registrations

Patent applications and USPTO patent grants for Narasimha; Usha.The latest application filed is for "multi-mode circuit and a method for preventing degradation in the multi-mode circuit".

Company Profile
0.5.3
  • Narasimha; Usha - Plano TX
  • Narasimha; Usha - Richardson TX
  • Narasimha; Usha - Dallas TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Generating delays of exit points for a clock circuit
Grant 10,203,718 - Narasimha Feb
2019-02-12
Timing verification in a programmable circuit design using variation factors
Grant 10,162,916 - Narasimha , et al. Dec
2018-12-25
Multi-mode circuit and a method for preventing degradation in the multi-mode circuit
Grant 8,013,635 - Jain , et al. September 6, 2
2011-09-06
Multi-mode Circuit And A Method For Preventing Degradation In The Multi-mode Circuit
App 20110193588 - JAIN; Palkesh ;   et al.
2011-08-11
Accurate noise modeling in digital designs
Grant 7,363,604 - Hill , et al. April 22, 2
2008-04-22
Method for circuit sensitivity driven parasitic extraction
Grant 7,318,208 - Narasimha , et al. January 8, 2
2008-01-08
Accurate noise modeling in digital designs
App 20070079265 - Hill; Anthony M. ;   et al.
2007-04-05
Method for circuit sensitivity driven parasitic extraction
App 20060085776 - Narasimha; Usha ;   et al.
2006-04-20

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