Narain; Prakash

Patent Applications and Registrations

Patent applications and USPTO patent grants for Narain; Prakash.The latest application filed is for "intent-driven functional verification of digital designs".

Company Profile

2.7.2

Narain; Prakash - San Carlos CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods for identifying integrated circuit failures caused by asynchronous clock-domain crossings in the presence of multiple modes Grant 10,935,595 - Vimjam , et al. March 2, 2	2021-03-02
Methods for identifying integrated circuit failures caused by reset-domain interactions Grant 10,936,774 - Katzir , et al. March 2, 2	2021-03-02
Hierarchical functional verification Grant 6,839,884 - Narain , et al. January 4, 2	2005-01-04
Intent-driven functional verification of digital designs App 20040117746 - Narain, Prakash ; et al.	2004-06-17
Method and apparatus for characterizing information about design attributes Grant 6,704,912 - Narain , et al. March 9, 2	2004-03-09
Method And Apparatus For Characterizing Information About Design Attributes App 20030229863 - Narain, Prakash ; et al.	2003-12-11
Intent-driven functional verification of digital designs Grant 6,651,228 - Narain , et al. November 18, 2	2003-11-18
Determining dependency relationships among design verification checks Grant 6,571,375 - Narain , et al. May 27, 2	2003-05-27
Automatic formulation of design verification checks based upon a language representation of a hardware design to verify the intended behavior of the hardware design Grant 6,539,523 - Narain , et al. March 25, 2	2003-03-25

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