loadpatents
Patent applications and USPTO patent grants for NANDI; Suvam.The latest application filed is for "reduced area, reduced power flip-flop".
Patent | Date |
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Reduced Area, Reduced Power Flip-flop App 20210265985 - SUBBANNAVAR; Badarish Mohan ;   et al. | 2021-08-26 |
Reduced area, reduced power flip-flop Grant 11,043,937 - Subbannavar , et al. June 22, 2 | 2021-06-22 |
Reduced Area, Reduced Power Flip-flop App 20210184659 - SUBBANNAVAR; Badarish Mohan ;   et al. | 2021-06-17 |
Internally truncated multiplier Grant 11,029,919 - Tangudu , et al. June 8, 2 | 2021-06-08 |
Internally Truncated Multiplier App 20200301666 - Tangudu; Jawaharlal ;   et al. | 2020-09-24 |
Digital down converter Grant 10,666,293 - Tangudu , et al. | 2020-05-26 |
Internally truncated multiplier Grant 10,635,396 - Tangudu , et al. | 2020-04-28 |
Internally Truncated Multiplier App 20190317731 - Tangudu; Jawaharlal ;   et al. | 2019-10-17 |
Ultra-Low Power Static State Flip Flop App 20190319612 - Nandi; Suvam ;   et al. | 2019-10-17 |
Transformation based filter for interpolation or decimation Grant 10,396,829 - Balakrishnan , et al. A | 2019-08-27 |
Ultra-low power static state flip flop Grant 10,382,020 - Nandi , et al. A | 2019-08-13 |
Internally truncated multiplier Grant 10,372,415 - Tangudu , et al. | 2019-08-06 |
Transformation Based Filter for Interpolation or Decimation App 20180367169 - Balakrishnan; Jaiganesh ;   et al. | 2018-12-20 |
Ultra-Low Power Static State Flip Flop App 20180331675 - Nandi; Suvam ;   et al. | 2018-11-15 |
Transformation based filter for interpolation or decimation Grant 10,090,866 - Balakrishnan , et al. October 2, 2 | 2018-10-02 |
Digital Down Converter App 20180241413 - TANGUDU; Jawaharlal ;   et al. | 2018-08-23 |
Ultra-low power static state flip flop Grant 10,056,882 - Nandi , et al. August 21, 2 | 2018-08-21 |
Transformation Based Filter For Interpolation Or Decimation App 20180191383 - Balakrishnan; Jaiganesh ;   et al. | 2018-07-05 |
Digital down converter Grant 9,985,650 - Tangudu , et al. May 29, 2 | 2018-05-29 |
Internally Truncated Multiplier App 20170322773 - TANGUDU; Jawaharlal ;   et al. | 2017-11-09 |
Ultra-low Power Static State Flip Flop App 20170194943 - NANDI; Suvam ;   et al. | 2017-07-06 |
Low area full adder with shared transistors Grant 9,471,278 - Nandi , et al. October 18, 2 | 2016-10-18 |
Low area flip-flop with a shared inverter Grant 9,425,771 - Nandi , et al. August 23, 2 | 2016-08-23 |
Flip-flops with low clock power Grant 9,350,327 - Nandi , et al. May 24, 2 | 2016-05-24 |
Low Area Full Adder With Shared Transistors App 20160092170 - Nandi; Suvam ;   et al. | 2016-03-31 |
Low Area Flip-flop With A Shared Inverter App 20160094203 - Nandi; Suvam ;   et al. | 2016-03-31 |
Flip-flops With Low Clock Power App 20160094204 - Nandi; Suvam ;   et al. | 2016-03-31 |
Integrated clock gating cell using a low area and a low power latch Grant 9,246,489 - Nandi , et al. January 26, 2 | 2016-01-26 |
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