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name:-0.0328528881073
name:-0.024987936019897
name:-0.011983871459961
NaMLab gGmbH Patent Filings

NaMLab gGmbH

Patent Applications and Registrations

Patent applications and USPTO patent grants for NaMLab gGmbH.The latest application filed is for "semiconductor device structure having multiple gate terminals".

Company Profile
15.36.23
  • NaMLab gGmbH - Dresden N/A DE
  • NaMLab gGmbH - DE DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Device including a floating gate electrode and a layer of ferroelectric material and method for the formation thereof
Grant 11,424,253 - Mueller , et al. August 23, 2
2022-08-23
Ferroelectric memory and logic cell and operation method
Grant 11,205,467 - Slesazeck , et al. December 21, 2
2021-12-21
Electrical storage device with negative capacitance
Grant 11,145,665 - Hoffmann October 12, 2
2021-10-12
Semiconductor Device Structure Having Multiple Gate Terminals
App 20210202752 - Simon; Maik ;   et al.
2021-07-01
Transistor with adjustable rectifying transfer characteristic
Grant 10,978,125 - April 13, 2
2021-04-13
Artificial neuron based on ferroelectric circuit element
Grant 10,963,776 - Mulaosmanovic , et al. March 30, 2
2021-03-30
Integrated circuit including a ferroelectric memory cell and manufacturing method thereof
Grant 10,872,905 - Muller December 22, 2
2020-12-22
Ferroelectric Memory And Logic Cell And Operation Method
App 20200357453 - Slesazeck; Stefan ;   et al.
2020-11-12
Electrical Storage Device with Negative Capacitance
App 20200350324 - HOFFMANN; Michael
2020-11-05
Ferroelectric memory cell for an integrated circuit
Grant 10,600,808 - Schroder
2020-03-24
Artificial Neuron Based On Ferroelectric Circuit Element
App 20200065647 - Mulaosmanovic; Halid ;   et al.
2020-02-27
Heterostructure of an Electronic Circuit Having a Semiconductor Device
App 20200020790 - SCHMULT; Stefan ;   et al.
2020-01-16
Polarization-based configurable logic gate
Grant 10,424,379 - Slesazeck , et al. Sept
2019-09-24
Reconfigurable nanowire field effect transistor, a nanowire array and an integrated circuit thereof
Grant 10,347,760 - Baldauf , et al. July 9, 2
2019-07-09
Polarization-based Configurable Logic Gate
App 20190172539 - Slesazeck; Stefan ;   et al.
2019-06-06
Ferroelectric Memory Cell for an Integrated Circuit
App 20190074295 - SCHRODER; Uwe
2019-03-07
Application of antiferroelectric like materials in non-volatile memory devices
Grant 10,056,393 - Schroder , et al. August 21, 2
2018-08-21
Multilevel ferroelectric memory cell for an integrated circuit
Grant 10,043,567 - Slesazeck , et al. August 7, 2
2018-08-07
Integrated Circuit Including a Ferroelectric Memory Cell and Manufacturing Method Thereof
App 20180166453 - MULLER; Stefan
2018-06-14
Device Including A Floating Gate Electrode And A Layer Offerroelectric Material And Method For The Formation Thereof
App 20180151577 - Mueller; Johannes ;   et al.
2018-05-31
Multilevel Ferroelectric Memory Cell for an Integrated Circuit
App 20180082729 - SLESAZECK; Stefan ;   et al.
2018-03-22
Reconfigurable Nanowire Field Effect Transistor, A Nanowire Array And An Integrated Circuit Thereof
App 20180012996 - BALDAUF; Tim ;   et al.
2018-01-11
Method of forming a device including a floating gate electrode and a layer of ferroelectric material
Grant 9,865,608 - Mueller , et al. January 9, 2
2018-01-09
Multilevel ferroelectric memory cell for an integrated circuit
Grant 9,830,969 - Slesazeck , et al. November 28, 2
2017-11-28
Charge storage ferroelectric memory hybrid and erase scheme
Grant 9,818,468 - Muller November 14, 2
2017-11-14
Application of Antiferroelectric Like Materials in Non-Volatile Memory Devices
App 20170256552 - SCHRODER; Uwe ;   et al.
2017-09-07
Multilevel Ferroelectric Memory Cell for an Integrated Circuit
App 20170162250 - SLESAZECK; Stefan ;   et al.
2017-06-08
Charge Storage Ferroelectric Memory Hybrid And Erase Scheme
App 20170076775 - MULLER; Stefan Ferdinand
2017-03-16
Charge storage ferroelectric memory hybrid and erase scheme
Grant 9,558,804 - Muller January 31, 2
2017-01-31
Method Of Forming A Device Including A Floating Gate Electrode And A Layer Of Ferroelectric Material
App 20160268271 - Mueller; Johannes ;   et al.
2016-09-15
Capacitors including amorphous dielectric layers and methods of forming the same
Grant 9,437,420 - Cho , et al. September 6, 2
2016-09-06
Device Including A Floating Gate Electrode And A Layer Of Ferroelectric Material And Method For The Formation Thereof
App 20160064510 - Mueller; Johannes ;   et al.
2016-03-03
Charge Storage Ferroelectric Memory Hybrid And Erase Scheme
App 20160027490 - Muller; Stefan Ferdinand
2016-01-28
Capacitors Including Amorphous Dielectric Layers And Methods Of Forming The Same
App 20150357399 - Cho; Kyu-Ho ;   et al.
2015-12-10
Ferroelectric memory cell for an integrated circuit
Grant 9,053,802 - Muller , et al. June 9, 2
2015-06-09
Photodiode having a p-n junction with varying expansion of the space charge zone due to application of a variable voltage
Grant 8,946,617 - Holz , et al. February 3, 2
2015-02-03
Ferroelectric Memory Cell For An Integrated Circuit
App 20140355328 - Muller; Stefan Ferdinand ;   et al.
2014-12-04
Integrated circuit including a ferroelectric memory cell and method of manufacturing the same
Grant 8,304,823 - Boescke November 6, 2
2012-11-06
Company Registrations

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