Nakos; James S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nakos; James S..The latest application filed is for "base profile of self-aligned bipolar transistors for power amplifier applications".

Company Profile

0.53.44

Nakos; James S. - Essex Junction VT
Nakos; James S. - Essex VT US
Nakos; James S - Essex Junction VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for conversion of commercial microprocessor to radiation-hardened processor and resulting processor Grant 9,646,125 - Fifield , et al. May 9, 2	2017-05-09
Deep trench decoupling capacitor and methods of forming Grant 9,385,179 - Nakos , et al. July 5, 2	2016-07-05
Base profile of self-aligned bipolar transistors for power amplifier applications Grant 9,269,787 - Dunn , et al. February 23, 2	2016-02-23
Base Profile Of Self-aligned Bipolar Transistors For Power Amplifier Applications App 20150303275 - Dunn; James S. ; et al.	2015-10-22
Base profile of self-aligned bipolar transistors for power amplifier applications Grant 9,105,677 - Dunn , et al. August 11, 2	2015-08-11
Base Profile Of Self-aligned Bipolar Transistors For Power Amplifier Applications App 20150108548 - Dunn; James S. ; et al.	2015-04-23
Silicided trench contact to buried conductive layer Grant 8,872,281 - Coolbaugh , et al. October 28, 2	2014-10-28
Method For Conversion Of Commercial Microprocessor To Radiation-hardened Processor And Resulting Processor App 20140258958 - FIFIELD; John A. ; et al.	2014-09-11
Silicided Trench Contact To Buried Conductive Layer App 20140239498 - Coolbaugh; Douglas D. ; et al.	2014-08-28
Ferroelectric random access memory with optimized hardmask Grant 8,796,044 - Beecher , et al. August 5, 2	2014-08-05
Ferroelectric Random Access Memory With Optimized Hardmask App 20140203342 - Beecher; James E. ; et al.	2014-07-24
Dual contact trench resistor and capacitor in shallow trench isolation (STI) and methods of manufacture Grant 8,741,729 - Kemerer , et al. June 3, 2	2014-06-03
Method for fabricating a nitrided silicon-oxide gate dielectric Grant 8,709,887 - Burnham , et al. April 29, 2	2014-04-29
Ferroelectric Random Access Memory With Optimized Hardmask App 20140084352 - Beecher; James E. ; et al.	2014-03-27
Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip Grant 8,658,435 - Czabaj , et al. February 25, 2	2014-02-25
Dual contact trench resistor in shallow trench isolation (STI) and methods of manufacture Grant 8,614,137 - Kemerer , et al. December 24, 2	2013-12-24
Dual Contact Trench Resistor And Capacitor In Shallow Trench Isolation (sti) And Methods Of Manufacture App 20130292798 - KEMERER; Timothy W. ; et al.	2013-11-07
Dual contact trench resistor and capacitor in shallow trench isolation (STI) and methods of manufacture Grant 8,546,243 - Kemerer , et al. October 1, 2	2013-10-01
Trench Isolation And Method Of Fabricating Trench Isolation App 20130189818 - Hook; Terence B. ; et al.	2013-07-25
Deep trench decoupling capacitor Grant 8,492,816 - Nakos , et al. July 23, 2	2013-07-23
Deep Trench Decoupling Capacitor And Methods Of Forming App 20130147015 - Nakos; James S. ; et al.	2013-06-13
Hydrogen Barrier Liner For Ferro-electric Random Access Memory (fram) Chip App 20130137233 - Czabaj; Brian M. ; et al.	2013-05-30
Ferro-electric capacitor modules, methods of manufacture and design structures Grant 8,450,168 - Gambino , et al. May 28, 2	2013-05-28
Embedded series deep trench capacitors and methods of manufacture Grant 8,441,103 - Kemerer , et al. May 14, 2	2013-05-14
Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip Grant 8,395,196 - Czabaj , et al. March 12, 2	2013-03-12
Structure for dual contact trench capacitor and structure thereof Grant 8,384,140 - Kemerer , et al. February 26, 2	2013-02-26
Silicided trench contact to buried conductive layer Grant 8,338,265 - Coolbaugh , et al. December 25, 2	2012-12-25
Dual Contact Trench Resistor And Capacitor In Shallow Trench Isolation (sti) And Methods Of Manufacture App 20120299152 - KEMERER; Timothy W. ; et al.	2012-11-29
Structure having substantially parallel resistor material lengths Grant 8,284,017 - Hakey , et al. October 9, 2	2012-10-09
Dual Contact Trench Resistor In Shallow Trench Isolation (sti) And Methods Of Manufacture App 20120205776 - KEMERER; Timothy W. ; et al.	2012-08-16
Oxide Based LED BEOL Integration App 20120146069 - Nakos; James S.	2012-06-14
Structure for dual contact trench capacitor and structure thereof Grant 8,198,663 - Kemerer , et al. June 12, 2	2012-06-12
Hydrogen Barrier Liner For Ferro-electric Random Access Memory (fram) Chip App 20120119273 - Czabaj; Brian M. ; et al.	2012-05-17
Embedded Series Deep Trench Capacitors And Methods Of Manufacture App 20120104551 - KEMERER; Timothy W. ; et al.	2012-05-03
Embedded series deep trench capacitors and methods of manufacture Grant 8,143,135 - Kemerer , et al. March 27, 2	2012-03-27
Structure Having Substantially Parallel Resistor Material Lengths App 20120042298 - Hakey; Mark C. ; et al.	2012-02-16
Resistor and design structure having substantially parallel resistor material lengths Grant 8,111,129 - Hakey , et al. February 7, 2	2012-02-07
Ferro-electric Capacitor Modules, Methods Of Manufacture And Design Structures App 20110316058 - GAMBINO; Jeffrey P. ; et al.	2011-12-29
Resistor and design structure having resistor material length with sub-lithographic width Grant 8,044,764 - Hakey , et al. October 25, 2	2011-10-25
Deep Trench Decoupling Capacitor App 20110169131 - Nakos; James S. ; et al.	2011-07-14
Method For Conversion Of Commercial Microprocessor To Radiation-hardened Processor And Resulting Processor App 20110088008 - FIFIELD; John A. ; et al.	2011-04-14
Embedded Series Deep Trench Capacitors And Methods Of Manufacture App 20110084360 - KEMERER; Timothy W. ; et al.	2011-04-14
Method of manufacturing a dual contact trench capacitor Grant 7,897,473 - Kemerer , et al. March 1, 2	2011-03-01
Selective Nitridation Of Gate Oxides App 20100187614 - BURNHAM; Jay S. ; et al.	2010-07-29
Method of manufacturing a dual contact trench capacitor Grant 7,759,189 - Kemerer , et al. July 20, 2	2010-07-20
Selective nitridation of gate oxides Grant 7,759,260 - Burnham , et al. July 20, 2	2010-07-20
Silicided Trench Contact to Buried Conductive Layer App 20100117237 - Coolbaugh; Douglas D. ; et al.	2010-05-13
Structure For Dual Contact Trench Capacitor And Structure Thereof App 20100025814 - Kemerer; Timothy W. ; et al.	2010-02-04
Method Of Manufacturing A Dual Contact Trench Capacitor. App 20100029055 - Kemerer; Timothy W. ; et al.	2010-02-04
Structure For Dual Contact Trench Capacitor And Structure Therof App 20100025813 - Kemerer; Timothy W. ; et al.	2010-02-04
Method Of Manufacturing A Dual Contact Trench Capacitor App 20100029056 - Kemerer; Timothy W. ; et al.	2010-02-04
Resistor And Design Structure Having Substantially Parallel Resistor Material Lengths App 20090231087 - Hakey; Mark C. ; et al.	2009-09-17
Resistor And Design Structure Having Resistor Material Length With Sub-lithographic Width App 20090231085 - Hakey; Mark C. ; et al.	2009-09-17
Method For Fabricating A Nitrided Silicon-oxide Gate Dielectric App 20080014692 - Burnham; Jay S. ; et al.	2008-01-17
Method for fabricating a nitrided silicon-oxide gate dielectric Grant 7,291,568 - Burnham , et al. November 6, 2	2007-11-06
Selective Nitridation Of Gate Oxides App 20060281265 - BURNHAM; Jay S. ; et al.	2006-12-14
Selective nitridation of gate oxides Grant 7,138,691 - Burnham , et al. November 21, 2	2006-11-21
Method for forming self-aligned dual salicide in CMOS technologies Grant 7,112,481 - Fang , et al. September 26, 2	2006-09-26
Dual Silicide Process To Improve Device Performance App 20060163670 - Ellis-Monaghan; John J. ; et al.	2006-07-27
Method for forming self-aligned dual salicide in CMOS technologies Grant 7,067,368 - Fang , et al. June 27, 2	2006-06-27
Method for forming self-aligned dual salicide in CMOS technologies Grant 7,064,025 - Fang , et al. June 20, 2	2006-06-20
Method for forming self-aligned dual salicide in CMOS technologies App 20060121664 - Fang; Sunfei ; et al.	2006-06-08
Method For Forming Self-aligned Dual Salicide In Cmos Technologies App 20060121665 - Fang; Sunfei ; et al.	2006-06-08
Method For Forming Self-aligned Dual Salicide In Cmos Technologies App 20060121662 - Fang; Sunfei ; et al.	2006-06-08
Apparatus and method for forming a battery in an integrated circuit Grant 7,045,372 - Ballantine , et al. May 16, 2	2006-05-16
Silicon dioxide removing method Grant 6,967,167 - Geiss , et al. November 22, 2	2005-11-22
Selective Nitridation Of Gate Oxides App 20050164444 - Burnham, Jay S. ; et al.	2005-07-28
Thermal nitrogen distribution method to improve uniformity of highly doped ultra-thin gate capacitors Grant 6,909,157 - Burnham , et al. June 21, 2	2005-06-21
Silicon Dioxide Removing Method App 20050070101 - Geiss, Peter J. ; et al.	2005-03-31
Method For Fabricating A Nitrided Silicon-oxide Gate Dielectric App 20050048705 - Burnham, Jay S. ; et al.	2005-03-03
Thermal nitrogen distribution method to improve uniformity of highly doped ultra-thin gate capacitors App 20050040480 - Burnham, Jay S. ; et al.	2005-02-24
Method for fabricating a nitrided silicon-oxide gate dielectric Grant 6,780,720 - Burnham , et al. August 24, 2	2004-08-24
Thermal nitrogen distribution method to improve uniformity of highly doped ultra-thin gate capacitors Grant 6,706,644 - Burnham , et al. March 16, 2	2004-03-16
Apparatus and method for forming a battery in an integrated circuit App 20040021201 - Ballantine, Arne W. ; et al.	2004-02-05
Thermal Nitrogen Distribution Method To Improve Uniformity Of Highly Doped Ultra-thin Gate Capacitors App 20040018688 - Burnham, Jay S. ; et al.	2004-01-29
Method for fabricating a nitrided silicon-oxide gate dielectric App 20040002226 - Burnham, Jay S. ; et al.	2004-01-01
Apparatus and method for forming a battery in an integrated circuit Grant 6,650,000 - Ballantine , et al. November 18, 2	2003-11-18
Apparatus and method for forming a battery in an intergrated circuit App 20020093029 - Ballantine, Arne W. ; et al.	2002-07-18
NVRAM cell having increased coupling ratio between a control gate and floating gate without an increase in cell area Grant 6,373,095 - Bracchitta , et al. April 16, 2	2002-04-16
Borderless contact to diffusion with respect to gate conductor and methods for fabricating App 20010019886 - Bruce, James Allan ; et al.	2001-09-06
Apparatus and method for detecting defective NVRAM cells Grant 6,256,755 - Hook , et al. July 3, 2	2001-07-03
NVRAM utilizing high voltage TFT device and method for making the same Grant 6,022,770 - Hook , et al. February 8, 2	2000-02-08
Sidewall strap Grant 5,521,118 - Lam , et al. May 28, 1	1996-05-28
Methods and compositions for the selective etching of silicon Grant 5,431,777 - Austin , et al. July 11, 1	1995-07-11
Process for improving sheet resistance of an integrated circuit device gate Grant 5,268,330 - Givens , et al. December 7, 1	1993-12-07
Emissivity independent temperature measurement systems Grant 5,226,732 - Nakos , et al. July 13, 1	1993-07-13
Boron out-diffused surface strap process Grant 5,185,294 - Lam , et al. February 9, 1	1993-02-09

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