loadpatents
Patent applications and USPTO patent grants for Nakazato; Takaaki.The latest application filed is for "semiconductor storage device and method of reading data therefrom".
Patent | Date |
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Semiconductor storage device and method of reading data therefrom Grant 10,734,075 - Inuzuka , et al. | 2020-08-04 |
Semiconductor memory device Grant 10,672,473 - Nakazato , et al. | 2020-06-02 |
Semiconductor Storage Device And Method Of Reading Data Therefrom App 20200082880 - INUZUKA; Yuki ;   et al. | 2020-03-12 |
Semiconductor Memory Device App 20190287616 - NAKAZATO; Takaaki ;   et al. | 2019-09-19 |
Sense amplifier circuit Grant 9,318,189 - Nakazato April 19, 2 | 2016-04-19 |
Sense Amplifier Circuit App 20140140144 - NAKAZATO; Takaaki | 2014-05-22 |
Method and system for semiconductor memory Grant 7,719,880 - Nakazato May 18, 2 | 2010-05-18 |
Method and System for Semiconductor Memory App 20090201719 - Nakazato; Takaaki | 2009-08-13 |
Methods and apparatus for reducing leakage current in a disabled SOI circuit Grant 7,444,525 - Yoshihara , et al. October 28, 2 | 2008-10-28 |
Method and apparatus for wordline redundancy control of memory in an information handling system Grant 7,423,921 - Asano , et al. September 9, 2 | 2008-09-09 |
Method and Apparatus for Wordline Redundancy Control of Memory in an Information Handling System App 20080013388 - Asano; Toru ;   et al. | 2008-01-17 |
Method and apparatus for avoiding cell data destruction caused by SRAM cell instability App 20070279965 - Nakazato; Takaaki ;   et al. | 2007-12-06 |
Method and apparatus for row based power control of a microprocessor memory array App 20070043895 - Adams; Chad Allen ;   et al. | 2007-02-22 |
Methods and apparatus for reducing leakage current in a disabled SOI circuit App 20060270173 - Yoshihara; Hiroshi ;   et al. | 2006-11-30 |
Apparatus and method of word line decoding for deep pipelined memory Grant 7,139,215 - Asano , et al. November 21, 2 | 2006-11-21 |
Systems and methods for controlling timing in a circuit Grant 7,071,737 - Kawasumi , et al. July 4, 2 | 2006-07-04 |
SOI sense amplifier with cross-coupled body terminal Grant 7,053,668 - Nakazato , et al. May 30, 2 | 2006-05-30 |
SOI sense amplifier with cross-coupled bit line structure Grant 7,046,045 - Nakazato , et al. May 16, 2 | 2006-05-16 |
Apparatus and method of word line decoding for deep pipelined memory App 20060098520 - Asano; Toru ;   et al. | 2006-05-11 |
Systems and methods for controlling timing in a circuit App 20060012403 - Kawasumi; Atsushi ;   et al. | 2006-01-19 |
SOI sense amplifier with pre-charge App 20050264322 - Nakazato, Takaaki ;   et al. | 2005-12-01 |
SOI sense amplifier with cross-coupled bit line structure App 20050264323 - Nakazato, Takaaki ;   et al. | 2005-12-01 |
SOI sense amplifier with cross-coupled body terminal App 20050264324 - Nakazato, Takaaki ;   et al. | 2005-12-01 |
Latch type sense amplifier method and apparatus Grant 6,898,135 - Asano , et al. May 24, 2 | 2005-05-24 |
Apparatus and method of wordline/bitline redundancy control using shift registers in an SRAM Grant 6,885,596 - Asano , et al. April 26, 2 | 2005-04-26 |
Subarray control and subarray cell access in a memory module Grant 6,850,456 - Asano , et al. February 1, 2 | 2005-02-01 |
Latch type sense amplifier method and apparatus App 20040264276 - Asano, Toru ;   et al. | 2004-12-30 |
Subarray Control And Subarray Cell Access In A Memory Module App 20040264280 - Asano, Toru ;   et al. | 2004-12-30 |
Apparatus and method of wordline/bitline redundancy control using shift registers in an SRAM App 20040264265 - Asano, Toru ;   et al. | 2004-12-30 |
Pulse generating circuit Grant 6,833,736 - Nakazato , et al. December 21, 2 | 2004-12-21 |
Pulse generating circuit App 20040155688 - Nakazato, Takaaki ;   et al. | 2004-08-12 |
Semiconductor memory device App 20020021608 - Nakazato, Takaaki ;   et al. | 2002-02-21 |
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