| Patent | Date |
|---|
Vehicle control system
Grant 9,650,038 - Yoshimura , et al. May 16, 2 | 2017-05-16 |
Control device for railway power conditioner and control system for railway power conditioner
Grant 9,573,489 - Nakatsuka , et al. February 21, 2 | 2017-02-21 |
Vehicle Control System
App 20150100207 - YOSHIMURA; Kentaro ; et al. | 2015-04-09 |
Vehicle Control System
App 20140188343 - YOSHIMURA; Kentaro ; et al. | 2014-07-03 |
Power Converter and its Control Method
App 20140167701 - NAKATSUKA; Yasuhiro ; et al. | 2014-06-19 |
Control Device for Railway Power Conditioner and Control System for Railway Power Conditioner
App 20140152087 - NAKATSUKA; Yasuhiro ; et al. | 2014-06-05 |
Vehicle control system
Grant 8,645,022 - Yoshimura , et al. February 4, 2 | 2014-02-04 |
Apparatus for calculating and prefetching a branch target address
Grant 8,578,135 - Hirotsu , et al. November 5, 2 | 2013-11-05 |
Packet communication device, packet communication system, packet communication module, data processor, and data transfer system
Grant 8,423,661 - Arita , et al. April 16, 2 | 2013-04-16 |
Information Processing Apparatus
App 20120173850 - HIROTSU; Teppei ; et al. | 2012-07-05 |
Packet Communication Device, Packet Communication System, Packet Communication Module, Data Processor, And Data Transfer System
App 20110096667 - Arita; Hiroshi ; et al. | 2011-04-28 |
Packet communication device, packet communication system, packet communication system, packet communication module, data processor, and data transfer system
Grant 7,814,223 - Arita , et al. October 12, 2 | 2010-10-12 |
Micro controller for decompressing and compressing variable length codes via a compressed code dictionary
Grant 7,676,651 - Yamada , et al. March 9, 2 | 2010-03-09 |
Vehicle Control System
App 20100030421 - YOSHIMURA; Kentaro ; et al. | 2010-02-04 |
Vehicle control system
Grant 7,630,807 - Yoshimura , et al. December 8, 2 | 2009-12-08 |
Control and monitoring telecommunication system and method of setting a modulation method
Grant 7,570,748 - Ishii , et al. August 4, 2 | 2009-08-04 |
Memory access methods in a unified memory system
Grant 7,557,809 - Nakatsuka , et al. July 7, 2 | 2009-07-07 |
Packet communication device, packet communication system, packet communication system, packet communication module, data processor, and data transfer system
App 20090092147 - Arita; Hiroshi ; et al. | 2009-04-09 |
Packet communication apparatus
Grant 7,496,679 - Arita , et al. February 24, 2 | 2009-02-24 |
Packet communication apparatus
Grant 7,428,690 - Arita , et al. September 23, 2 | 2008-09-23 |
Packet communication apparatus
App 20080177855 - Arita; Hiroshi ; et al. | 2008-07-24 |
Data processor having unified memory architecture using register to optimize memory access
Grant 7,333,116 - Shimomura , et al. February 19, 2 | 2008-02-19 |
Optimizing Control Method and System, Overall Control Apparatus and Local Control Apparatus
App 20070250184 - Arita; Hiroshi ; et al. | 2007-10-25 |
Graphics drawing device and method
Grant 7,142,213 - Nakatsuka , et al. November 28, 2 | 2006-11-28 |
Information processor and information processing system utilizing interface for synchronizing clock signal
Grant 7,111,187 - Hotta , et al. September 19, 2 | 2006-09-19 |
Data processing apparatus and shading apparatus
App 20060202992 - Nakatsuka; Yasuhiro ; et al. | 2006-09-14 |
Data processing apparatus and shading apparatus
Grant 7,064,756 - Nakatsuka , et al. June 20, 2 | 2006-06-20 |
Microprocessor
App 20060064546 - Arita; Hiroshi ; et al. | 2006-03-23 |
Vehicle control system
App 20060015231 - Yoshimura; Kentaro ; et al. | 2006-01-19 |
Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein
Grant 6,986,029 - Yamada , et al. January 10, 2 | 2006-01-10 |
Data processor having unified memory architecture using register to optimize memory access
App 20050264574 - Shimomura, Tetsuya ; et al. | 2005-12-01 |
Data processor having unified memory architecture using register to optimize memory access
Grant 6,954,206 - Shimomura , et al. October 11, 2 | 2005-10-11 |
Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein
App 20050198471 - Yamada, Hiromichi ; et al. | 2005-09-08 |
Information processing apparatus
App 20050172110 - Hirotsu, Teppei ; et al. | 2005-08-04 |
Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein
Grant 6,915,413 - Yamada , et al. July 5, 2 | 2005-07-05 |
Control and monitoring telecommunication system and method of setting a modulation method
App 20050141683 - Ishii, Yoshikazu ; et al. | 2005-06-30 |
Packet communication apparatus
App 20050068897 - Arita, Hiroshi ; et al. | 2005-03-31 |
Memory access methods in a unified memory system
App 20050062749 - Nakatsuka, Yasuhiro ; et al. | 2005-03-24 |
Data processing apparatus and shading apparatus
App 20050041489 - Nakatsuka, Yasuhiro ; et al. | 2005-02-24 |
Information processing apparatus capable of prefetching instructions
App 20050027921 - Hirotsu, Teppei ; et al. | 2005-02-03 |
Micro controller for processing compressed codes
App 20050021929 - Yamada, Hiromichi ; et al. | 2005-01-27 |
Memory access methods in a unified memory system
Grant 6,839,063 - Nakatsuka , et al. January 4, 2 | 2005-01-04 |
Data processing apparatus and shading apparatus
Grant 6,806,875 - Nakatsuka , et al. October 19, 2 | 2004-10-19 |
Image processing device and system using the same
App 20040189649 - Nakatsuka, Yasuhiro ; et al. | 2004-09-30 |
Memory controller
Grant 6,745,279 - Morita , et al. June 1, 2 | 2004-06-01 |
Information processor and information processing system utilizing interface for synchronizing clock signal
App 20040093532 - Hotta, Takashi ; et al. | 2004-05-13 |
Image processing device and system using the same
Grant 6,731,291 - Nakatsuka , et al. May 4, 2 | 2004-05-04 |
Data processor having unified memory architecture providing priority memory access
Grant 6,717,583 - Shimomura , et al. April 6, 2 | 2004-04-06 |
Data processor having unified memory architecture using register to optimize memory access
App 20040056865 - Shimomura, Tetsuya ; et al. | 2004-03-25 |
Packet communication apparatus
App 20040034713 - Arita, Hiroshi ; et al. | 2004-02-19 |
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 6,675,311 - Hotta , et al. January 6, 2 | 2004-01-06 |
Picture processing apparatus and picture processing method
Grant 6,600,492 - Shimomura , et al. July 29, 2 | 2003-07-29 |
Packet communication device, packet communication system, packet communication module, data processor, and data transfer system
App 20030095560 - Arita, Hiroshi ; et al. | 2003-05-22 |
Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein
App 20030033482 - Yamada, Hiromichi ; et al. | 2003-02-13 |
Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein
App 20030033504 - Yamada, Hiromichi ; et al. | 2003-02-13 |
Memory controller
App 20020174292 - Morita, Yuichiro ; et al. | 2002-11-21 |
Data processing apparatus and shading apparatus
App 20020154116 - Nakatsuka, Yasuhiro ; et al. | 2002-10-24 |
Image processing device and system using the same
App 20020070942 - Nakatsuka, Yasuhiro ; et al. | 2002-06-13 |
Information processor and information processing system utilizing interface for synchronizing clock signal
App 20020059538 - Hotta, Takashi ; et al. | 2002-05-16 |
Graphic processor and data processing system
App 20020033827 - Nakamura, Atsushi ; et al. | 2002-03-21 |
Data processor having unified memory architecture providing priority memory access
App 20020030688 - Shimomura, Tetsuya ; et al. | 2002-03-14 |
Memory access methods in a unified memory system
App 20020030687 - Nakatsuka, Yasuhiro ; et al. | 2002-03-14 |
Image processing device and system using the same
Grant 6,356,269 - Nakatsuka , et al. March 12, 2 | 2002-03-12 |
Data processor having unified memory architecture providing priority memory access
Grant 6,333,745 - Shimomura , et al. December 25, 2 | 2001-12-25 |
Perspective projection calculation devices and methods
App 20010010517 - Iimura, Ichiro ; et al. | 2001-08-02 |
Data processing apparatus and register address translation method thereof
Grant 6,167,497 - Nakatsuka , et al. December 26, 2 | 2000-12-26 |
Graphics drawing device with hidden surface processing
Grant 6,084,599 - Nakatsuka , et al. July 4, 2 | 2000-07-04 |
Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory
Grant 5,968,160 - Saito , et al. October 19, 1 | 1999-10-19 |
Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory
Grant 5,784,630 - Saito , et al. July 21, 1 | 1998-07-21 |
Image data processor for processing pixel data in block buffer
Grant 5,748,202 - Nakatsuka , et al. May 5, 1 | 1998-05-05 |
Computer having a parallel operating capability
Grant 5,680,637 - Hotta , et al. October 21, 1 | 1997-10-21 |
Parallel processing apparatus and method capable of processing plural instructions in parallel or successively
Grant 5,561,775 - Kurosawa , et al. October 1, 1 | 1996-10-01 |
Information processor and information processing system utilizing clock signal
Grant 5,542,083 - Hotta , et al. July 30, 1 | 1996-07-30 |
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 5,506,982 - Hotta , et al. April 9, 1 | 1996-04-09 |
Parallel processing apparatus and method capable of switching parallel and successive processing modes
Grant 5,404,472 - Kurosawa , et al. April 4, 1 | 1995-04-04 |
Method and apparatus for controlling one or more hierarchical memories using a virtual storage scheme and physical to virtual address translation
Grant 5,392,416 - Doi , et al. February 21, 1 | 1995-02-21 |
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 5,388,249 - Hotta , et al. February 7, 1 | 1995-02-07 |
Parallel processing apparatus and method capable of switching parallel and successive processing modes
Grant 5,287,465 - Kurosawa , et al. February 15, 1 | 1994-02-15 |
Method and apparatus for controlling one or more hierarchical memories using a virtual storage scheme and physical to virtual address translation
Grant 5,257,361 - Doi , et al. October 26, 1 | 1993-10-26 |
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 5,133,064 - Hotta , et al. July 21, 1 | 1992-07-21 |
| 