Nakashima; Hidemi
Patent Applications and Registrations
Patent applications and USPTO patent grants for Nakashima; Hidemi.The latest application filed is for "memory interface control circuit".
- Nakashima; Hidemi - Kanagawa JP
| Patent | Date |
|---|---|
| Memory interface control circuit Grant 8,320,204 - Nakashima November 27, 2 | 2012-11-27 |
| Memory Interface Control Circuit App 20110007586 - NAKASHIMA; Hidemi | 2011-01-13 |
| Memory read control circuit Grant 7,826,281 - Nakashima November 2, 2 | 2010-11-02 |
| Clock distribution circuit and test method Grant 7,733,079 - Nakashima June 8, 2 | 2010-06-08 |
| Memory read control circuit App 20090034346 - Nakashima; Hidemi | 2009-02-05 |
| Clock distribution circuit and test method App 20080284483 - Nakashima; Hidemi | 2008-11-20 |
| Terminating resistor device and a method for testing a terminating resistor circuit Grant 7,038,485 - Nakashima , et al. May 2, 2 | 2006-05-02 |
| Terminating resistor device and a method for testing a terminating resistor circuit App 20040150421 - Nakashima, Hidemi ; et al. | 2004-08-05 |
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