Nakano; Tomio
Patent Applications and Registrations
Patent applications and USPTO patent grants for Nakano; Tomio.The latest application filed is for "intraorally rapidly disintergrating tablets and their production".
Company Profile
0.40.3
- Nakano; Tomio - Sakai N/A JP
- NAKANO; Tomio - Osada JP
- Nakano, Tomio - Osaka JP
- Nakano; Tomio - Kasugai JP
- Nakano; Tomio - Kawasaki JP
- Nakano; Tomio - Iwata JP
- Nakano; Tomio - Yokohama JP
Patent Activity
| Patent | Date |
|---|---|
| Tablet quickly melting in oral cavity Grant 8,580,305 - Suga , et al. November 12, 2 | 2013-11-12 |
| Intraorally Rapidly Disintergrating Tablets and Their Production App 20080299192 - SUGA; Tomoharu ; et al. | 2008-12-04 |
| Tablet quickly melting in oral cavity App 20060134199 - Suga; Tomoharu ; et al. | 2006-06-22 |
| Process for producing medicinal solid dispersion App 20040013736 - Nakano, Tomio ; et al. | 2004-01-22 |
| Semiconductor device having input protective function Grant 5,747,837 - Iwase , et al. May 5, 1 | 1998-05-05 |
| Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type Grant 5,051,959 - Nakano , et al. September 24, 1 | 1991-09-24 |
| Dynamic random access memory having improved refresh timing Grant 4,985,868 - Nakano , et al. January 15, 1 | 1991-01-15 |
| Track for snow vehicle Grant 4,957,472 - Nakano September 18, 1 | 1990-09-18 |
| Semiconductor memory device capable of selective operation of memory cell blocks Grant 4,905,201 - Ohira , et al. February 27, 1 | 1990-02-27 |
| Integrated circuit device Grant 4,903,111 - Takemae , et al. February 20, 1 | 1990-02-20 |
| Complementary semiconductor device reducing latch-up phenomenon Grant 4,862,415 - Nakano August 29, 1 | 1989-08-29 |
| Semiconductor memory device having stacked-capacitor type memory cells Grant 4,754,313 - Takemae , et al. June 28, 1 | 1988-06-28 |
| Semiconductor integrated circuit with redundant circuit replacement Grant 4,752,914 - Nakano , et al. June 21, 1 | 1988-06-21 |
| Dynamic semiconductor memory device having a simultaneous test function for divided memory cell blocks Grant 4,744,061 - Takemae , et al. May 10, 1 | 1988-05-10 |
| Semiconductor memory device having a circuit for compensating for discriminating voltage of memory cells Grant 4,716,549 - Nakano , et al. December 29, 1 | 1987-12-29 |
| Semiconductor memory device having extended period for outputting data Grant 4,707,811 - Takemae , et al. November 17, 1 | 1987-11-17 |
| Semiconductor integrated circuit device having fuse-type information storing circuit Grant 4,707,806 - Takemae , et al. November 17, 1 | 1987-11-17 |
| Semiconductor memory device having divided regular circuits Grant 4,660,174 - Takemae , et al. April 21, 1 | 1987-04-21 |
| Semiconductor memory device having stacked capacitor-type memory cells Grant 4,649,406 - Takemae , et al. March 10, 1 | 1987-03-10 |
| Semiconductor memory device having stacked capacitor-type memory cells Grant 4,641,166 - Takemae , et al. February 3, 1 | 1987-02-03 |
| Semiconductor memory device Grant 4,636,982 - Takemae , et al. January 13, 1 | 1987-01-13 |
| Semiconductor memory device having active pull-up circuits Grant 4,601,017 - Mochizuki , et al. July 15, 1 | 1986-07-15 |
| Dynamic semiconductor memory device Grant 4,597,059 - Takemae , et al. June 24, 1 | 1986-06-24 |
| Information storing circuit using blown and unblown fuses Grant 4,592,025 - Takemae , et al. May 27, 1 | 1986-05-27 |
| Semiconductor memory device having clamp circuits Grant 4,592,020 - Takemae , et al. May 27, 1 | 1986-05-27 |
| Semiconductor integrated circuit Grant 4,583,179 - Horii , et al. April 15, 1 | 1986-04-15 |
| Semiconductor memory device Grant 4,581,720 - Takemae , et al. April 8, 1 | 1986-04-08 |
| MIS transistor circuit Grant 4,578,781 - Ogawa , et al. March 25, 1 | 1986-03-25 |
| Semiconductor device for pulling down output terminal voltage Grant 4,570,088 - Nozaki , et al. February 11, 1 | 1986-02-11 |
| Dynamic semiconductor memory device with balanced sensing arrangement Grant 4,545,037 - Nakano , et al. October 1, 1 | 1985-10-01 |
| Semiconductor memory device Grant 4,532,613 - Takemae , et al. July 30, 1 | 1985-07-30 |
| Semiconductor memory device Grant 4,511,997 - Nozaki , et al. April 16, 1 | 1985-04-16 |
| Semiconductor integrated circuit device having a substrate voltage generating circuit Grant 4,503,339 - Tsuge , et al. March 5, 1 | 1985-03-05 |
| System for driving a dynamic random access memory device Grant 4,486,860 - Takemae , et al. December 4, 1 | 1984-12-04 |
| Bias-voltage generator Grant 4,450,515 - Takemae , et al. May 22, 1 | 1984-05-22 |
| Semiconductor buffer circuit having compensation for power source fluctuation Grant 4,443,714 - Nakano , et al. April 17, 1 | 1984-04-17 |
| Semiconductor devices having fuses Grant 4,413,272 - Mochizuki , et al. November 1, 1 | 1983-11-01 |
| Address buffer circuit Grant 4,396,845 - Nakano August 2, 1 | 1983-08-02 |
| Semiconductor memory device technical field Grant 4,392,211 - Nakano , et al. July 5, 1 | 1983-07-05 |
| Semiconductor memory device having flip-flop circuits Grant 4,291,394 - Nakano , et al. September 22, 1 | 1981-09-22 |
| Semiconductor memory device with a plurality of memory cells and a sense amplifier circuit thereof Grant 4,158,241 - Takemae , et al. June 12, 1 | 1979-06-12 |
| Integrated semiconductor memory device Grant 4,156,939 - Takemae , et al. May 29, 1 | 1979-05-29 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 