NAKAJIMA; Hiromasa

Patent Applications and Registrations

Patent applications and USPTO patent grants for NAKAJIMA; Hiromasa.The latest application filed is for "reflector antenna device".

Company Profile

4.6.7

NAKAJIMA; Hiromasa - Tokyo JP
Nakajima; Hiromasa - Makinohara JP
NAKAJIMA; Hiromasa - Makinohara-shi JP
Nakajima; Hiromasa - Machida JP
Nakajima, Hiromasa - Machida-shi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Reflector Antenna Device App 20220216618 - NAKAJIMA; Hiromasa ; et al.	2022-07-07
Polarized Waveguide Filter And Antenna Feeding Circuit App 20220045412 - YUKAWA; Hidenori ; et al.	2022-02-10
Antenna Device App 20210359403 - NAKAJIMA; Hiromasa ; et al.	2021-11-18
Hollow-waveguide-to-planar-waveguide transition circuit comprising a coupling conductor disposed over slots in a ground conductor Grant 11,069,949 - Nakajima , et al. July 20, 2	2021-07-20
Tape winding device Grant 11,054,236 - Nakajima , et al. July 6, 2	2021-07-06
Hollow-waveguide-to-planar-waveguide transition including a coupling conductor having one or more conductors branching therefrom Grant 10,811,753 - Nakajima , et al. October 20, 2	2020-10-20
Hollow-waveguide-to-planar-waveguide Transition Circuit App 20200235454 - NAKAJIMA; Hiromasa ; et al.	2020-07-23
Tape Winding Device App 20200116467 - NAKAJIMA; Hiromasa ; et al.	2020-04-16
Hollow-waveguide-to-planar-waveguide Transition Circuit App 20190148808 - NAKAJIMA; Hiromasa ; et al.	2019-05-16
Clock phase adjustment method, integrated circuit, and method for designing the integrated circuit Grant 6,853,589 - Tojima , et al. February 8, 2	2005-02-08
Video processing apparatus for performing address generation and control, and method therefor Grant 6,791,625 - Kohashi , et al. September 14, 2	2004-09-14
Clock phase adjustment method, integrated circuit, and method for designing the integrated circuit App 20030179625 - Tojima, Masayoshi ; et al.	2003-09-25
Clock phase adjustment method, and integrated circuit and design method therefor Grant 6,556,505 - Tojima , et al. April 29, 2	2003-04-29

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