loadpatents
Patent applications and USPTO patent grants for NAGARAJAN; Ranganathan.The latest application filed is for "mems devices and methods of forming thereof".
Patent | Date |
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Mems Devices And Methods Of Forming Thereof App 20220144625 - NAGARAJAN; Ranganathan ;   et al. | 2022-05-12 |
MEMS devices and methods of forming thereof Grant 11,267,696 - Nagarajan , et al. March 8, 2 | 2022-03-08 |
Mems Devices And Methods Of Forming Thereof App 20210130162 - NAGARAJAN; Ranganathan ;   et al. | 2021-05-06 |
Piezoelectric Mems Devices And Methods Of Forming Thereof App 20210050506 - XIA; Jia Jie ;   et al. | 2021-02-18 |
Layer arrangement and a wafer level package comprising the layer arrangement Grant 9,240,362 - Chidambaram , et al. January 19, 2 | 2016-01-19 |
Layer Arrangement And A Wafer Level Package Comprising The Layer Arrangement App 20150130039 - Chidambaram; Vivek ;   et al. | 2015-05-14 |
Cmos Compatible Wafer Bonding Layer And Process App 20150048509 - NAGARAJAN; Ranganathan ;   et al. | 2015-02-19 |
Fully salicided (FUCA) MOSFET structure Grant 7,682,914 - Lo , et al. March 23, 2 | 2010-03-23 |
RF and MMIC stackable micro-modules Grant 7,592,703 - Kripesh , et al. September 22, 2 | 2009-09-22 |
Method of forming through-wafer interconnects for vertical wafer level packaging Grant 7,381,629 - Sankarapillai , et al. June 3, 2 | 2008-06-03 |
Fully salicided (FUCA) MOSFET structure App 20080064153 - Qiang Lo; Patrick Guo ;   et al. | 2008-03-13 |
Method of stacking thin substrates by transfer bonding Grant 7,326,629 - Nagarajan , et al. February 5, 2 | 2008-02-05 |
Fully salicided (FUSA) MOSFET structure Grant 7,294,890 - Lo , et al. November 13, 2 | 2007-11-13 |
RF and MMIC stackable micro-modules App 20070222083 - Kripesh; Vaidyanathan ;   et al. | 2007-09-27 |
Method of forming through-wafer interconnects for vertical wafer level packaging App 20070141804 - Sankarapillai; Chirayarikathuveedu Premachandran ;   et al. | 2007-06-21 |
RF and MMIC stackable micro-modules Grant 7,230,318 - Kripesh , et al. June 12, 2 | 2007-06-12 |
Method of forming through-wafer interconnects for vertical wafer level packaging Grant 7,183,176 - Sankarapillai , et al. February 27, 2 | 2007-02-27 |
Fully salicided (FUSA) MOSFET structure App 20060199321 - Lo; Patrick Guo Qiang ;   et al. | 2006-09-07 |
Method of stacking thin substrates by transfer bonding App 20060057836 - Nagarajan; Ranganathan ;   et al. | 2006-03-16 |
Method of forming through-wafer interconnects for vertical wafer level packaging App 20060046432 - Sankarapillai; Chirayarikathuveedu Premachandran ;   et al. | 2006-03-02 |
RF and MMIC stackable micro-modules App 20050146049 - Kripesh, Vaidyanathan ;   et al. | 2005-07-07 |
Method of fabricating micro-mirror switching device Grant 6,858,459 - Singh , et al. February 22, 2 | 2005-02-22 |
Wafer-level package for micro-electro-mechanical systems Grant 6,846,725 - Nagarajan , et al. January 25, 2 | 2005-01-25 |
Wafer-level Inter-connector Formation Method App 20040185593 - Kripesh, Vaidyanathan ;   et al. | 2004-09-23 |
Sloped trench etching process App 20040178171 - Nagarajan, Ranganathan | 2004-09-16 |
Wafer-level inter-connector formation method Grant 6,787,456 - Kripesh , et al. September 7, 2 | 2004-09-07 |
Wafer-level package for micro-electro-mechanical systems App 20040077154 - Nagarajan, Ranganathan ;   et al. | 2004-04-22 |
Apparatus and method for fluid-based cooling of heat-generating devices Grant 6,717,812 - Pinjala , et al. April 6, 2 | 2004-04-06 |
Low temperature resist trimming process Grant 6,716,570 - Nagarajan , et al. April 6, 2 | 2004-04-06 |
Z-axis accelerometer Grant 6,662,654 - Miao , et al. December 16, 2 | 2003-12-16 |
Method Of Fabricating Micro-mirror Switching Device App 20030218227 - Singh, Janak ;   et al. | 2003-11-27 |
Low temperature resist trimming process App 20030219683 - Nagarajan, Ranganathan ;   et al. | 2003-11-27 |
Z-axis Accelerometer App 20030209076 - Miao, Yubo ;   et al. | 2003-11-13 |
Process for device using partial SOI App 20030040185 - Jun, Cai ;   et al. | 2003-02-27 |
Sloped trench etching process App 20020166838 - Nagarajan, Ranganathan | 2002-11-14 |
Lateral polysilicon beam process Grant 6,461,888 - Sridhar , et al. October 8, 2 | 2002-10-08 |
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