Nagarajan; Kumar

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nagarajan; Kumar.The latest application filed is for "structure and method for hybrid optical package with glass top cover".

Company Profile

1.28.12

Nagarajan; Kumar - Cupertino CA
Nagarajan; Kumar - San Jose CA US
Nagarajan; Kumar - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure and method for hybrid optical package with glass top cover Grant 10,461,066 - Nagarajan , et al. Oc	2019-10-29
Structure And Method For Hybrid Optical Package With Glass Top Cover App 20180006003 - NAGARAJAN; KUMAR ; et al.	2018-01-04
Optical sensor having a light emitter and a photodetector assembly directly mounted to a transparent substrate Grant 9,627,573 - Bhat , et al. April 18, 2	2017-04-18
Embedded die redistribution layers for active device Grant 9,443,815 - Liu , et al. September 13, 2	2016-09-13
Sacrificial pad on semiconductor package device and method Grant 9,397,027 - Chen , et al. July 19, 2	2016-07-19
Wafer level lens in package Grant 9,354,111 - Kerness , et al. May 31, 2	2016-05-31
Lid Assembly For Thermopile Temperature Sensing Device In Thermal Gradient Environment App 20150380627 - Emadi; Arvin ; et al.	2015-12-31
Stacked LED for optical sensor devices Grant 9,136,258 - Wang , et al. September 15, 2	2015-09-15
Embedded Die Redistribution Layers For Active Device App 20150243590 - Liu; Kai ; et al.	2015-08-27
Optical Sensor Having A Light Emitter And A Photodetector Assembly Directly Mounted To A Transparent Substrate App 20150243824 - Bhat; Jerome C. ; et al.	2015-08-27
Wafer Level Lens In Package App 20150109785 - Kerness; Nicole D. ; et al.	2015-04-23
Semiconductor structure and method for interconnection of integrated circuits Grant 8,841,752 - Chaware , et al. September 23, 2	2014-09-23
Integrated circuit packaging devices and methods Grant 8,810,028 - Zohni , et al. August 19, 2	2014-08-19
Semiconductor structure and method for interconnection of integrated circuits Grant 8,519,528 - Nagarajan , et al. August 27, 2	2013-08-27
Lead-free structures in a semiconductor device Grant 8,410,604 - Yip , et al. April 2, 2	2013-04-02
Integrated circuit assembly having vented heat-spreader Grant 8,258,013 - Nagarajan , et al. September 4, 2	2012-09-04
Lead-free Structures In A Semiconductor Device App 20120098130 - Yip; Laurene ; et al.	2012-04-26
Method of implementing a capacitor in an integrated circuit Grant 8,084,297 - Joshi , et al. December 27, 2	2011-12-27
Circuit for and method of implementing a capacitor in an integrated circuit Grant 7,791,192 - Joshi , et al. September 7, 2	2010-09-07
Integrated circuit having a lid and method of employing a lid on an integrated circuit Grant 7,473,583 - Nagarajan January 6, 2	2009-01-06
Low stress flip-chip package for low-K silicon technology Grant 7,190,082 - Nagarajan , et al. March 13, 2	2007-03-13
Integrated circuit having a lid and method of employing a lid on an integrated circuit Grant 7,187,077 - Nagarajan March 6, 2	2007-03-06
Multi-chip package having a contiguous heat spreader assembly Grant 6,963,129 - Evans , et al. November 8, 2	2005-11-08
Via construction for structural support Grant 6,943,446 - McCormick , et al. September 13, 2	2005-09-13
Electrostatic discharge protection Grant 6,911,736 - Nagarajan June 28, 2	2005-06-28
Electrostatic discharge protection App 20040245632 - Nagarajan, Kumar	2004-12-09
Stiffener design Grant 6,825,066 - Ranade , et al. November 30, 2	2004-11-30
Method of balanced coefficient of thermal expansion for flip chip ball grid array Grant 6,806,119 - Nagarajan , et al. October 19, 2	2004-10-19
Low stress flip-chip package for low-K silicon technology App 20040188862 - Nagarajan, Kumar ; et al.	2004-09-30
Method of balanced coefficient of thermal expansion for flip chip ball grid array App 20040121519 - Nagarajan, Kumar ; et al.	2004-06-24
Stiffener design App 20040105241 - Ranade, Yogendra ; et al.	2004-06-03
Via construction App 20040089953 - McCormick, John P. ; et al.	2004-05-13
Underfill gap enhancement App 20040070073 - Shah, Shirish ; et al.	2004-04-15
Balanced coefficient of thermal expansion for flip chip ball grid array Grant 6,639,321 - Nagarajan , et al. October 28, 2	2003-10-28
Method and structure for reducing the incidence of voiding in an underfill layer of an electronic component package Grant 6,320,127 - Nagarajan , et al. November 20, 2	2001-11-20
Flip chip ball grid array package with laminated substrate Grant 6,133,064 - Nagarajan , et al. October 17, 2	2000-10-17

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