Nagaraj; Krishnasawamy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nagaraj; Krishnasawamy.The latest application filed is for "piezo-electric sensor reset".

Company Profile

5.24.24

Nagaraj; Krishnasawamy - Plano TX
Nagaraj; Krishnasawamy - Somerville NJ
Nagaraj; Krishnasawamy - Hillsborough NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Differential sensor using thin-film piezoelectric capacitors Grant 11,393,971 - Khanna , et al. July 19, 2	2022-07-19
Piezo-electric Sensor Reset App 20210389174 - Zwerg; Michael ; et al.	2021-12-16
Piezo-electric sensor reset Grant 11,105,676 - Zwerg , et al. August 31, 2	2021-08-31
Differential Sensor Using Thin-film Piezoelectric Capacitors App 20200168786 - Khanna; Sudhanshu ; et al.	2020-05-28
Capacitive Sensing App 20190369148 - Nagaraj; Krishnasawamy ; et al.	2019-12-05
Capacitive sensing Grant 10,466,286 - Nagaraj , et al. No	2019-11-05
Capacitive sensing Grant 10,422,822 - Nagaraj , et al. Sept	2019-09-24
Piezo-electric Sensor Reset App 20190162590 - Zwerg; Michael ; et al.	2019-05-30
Capacitive Sensing App 20180335459 - Nagaraj; Krishnasawamy ; et al.	2018-11-22
Capacitive sensing Grant 10,060,959 - Nagaraj , et al. August 28, 2	2018-08-28
Capacitive Sensing App 20180106844 - Nagaraj; Krishnasawamy ; et al.	2018-04-19
Capacitive sensing Grant 9,846,185 - Nagaraj , et al. December 19, 2	2017-12-19
Systems and methods for tuning an oscillator frequency Grant 9,520,881 - Das , et al. December 13, 2	2016-12-13
Capacitive Sensing App 20140239977 - Nagaraj; Krishnasawamy ; et al.	2014-08-28
Capacitive Sensing App 20140239983 - Nagaraj; Krishnasawamy ; et al.	2014-08-28
System and method for reducing power consumption in a phased-locked loop circuit Grant 8,536,910 - Nagaraj , et al. September 17, 2	2013-09-17
Reference Clock Re-timing Scheme In Electronic Circuits App 20130211758 - Prathapan; Indu ; et al.	2013-08-15
Pipelined ADC with a VCO-based stage Grant 8,451,159 - Gupta , et al. May 28, 2	2013-05-28
Pipelined Adc With A Vco-based Stage App 20130120170 - Gupta; Amit K. ; et al.	2013-05-16
High speed resistor-DAC for SAR DAC Grant 8,395,538 - Das , et al. March 12, 2	2013-03-12
System And Method For Reducing Power Consumption In A Phased-locked Loop Circuit App 20120319734 - NAGARAJ; Krishnasawamy ; et al.	2012-12-20
High Speed Resistor-dac For Sar Dac App 20120319886 - DAS; Abhijit Kurmar ; et al.	2012-12-20
System and method for tuning FM synthesizer Grant 8,280,331 - Nagaraj , et al. October 2, 2	2012-10-02
Low Power Digital Phase Lock Loop Circuit App 20110273210 - Nagaraj; Krishnasawamy	2011-11-10
Low phase noise frequency synthesizer Grant 8,022,778 - Nagaraj , et al. September 20, 2	2011-09-20
Low Phase Noise Frequency Synthesizer App 20110084771 - Nagaraj; Krishnasawamy ; et al.	2011-04-14
Frequency Modulation Receiver With A Low Power Frequency Synthesizer App 20110053537 - NAGARAJ; KRISHNASAWAMY ; et al.	2011-03-03
System And Method For Tuning Fm Synthesizer App 20100119011 - Nagaraj; Krishnasawamy ; et al.	2010-05-13
Circuit design technique for increasing the bandwidth of sample-and-hold circuits in flash ADCs Grant 6,646,584 - Nagaraj , et al. November 11, 2	2003-11-11
Broadband sample and hold circuit Grant 6,642,752 - Nagaraj November 4, 2	2003-11-04
Low-voltage, broadband operational amplifier Grant 6,624,698 - Nagaraj September 23, 2	2003-09-23
True background calibration of pipelined analog digital converters Grant 6,606,042 - Sonkusale , et al. August 12, 2	2003-08-12
System for increasing the bandwidth of sample-and-hold circuits in flash ADCs Grant 6,597,302 - Nagaraj , et al. July 22, 2	2003-07-22
On-line cancellation of sampling mismatch in interleaved sample-and-hold circuits Grant 6,541,952 - Nagaraj April 1, 2	2003-04-01
Low-voltage, broadband operational amplifier App 20030001674 - Nagaraj, Krishnasawamy	2003-01-02
True background calibration of pipelined analog digital converters App 20020175843 - Sonkusale, Sameer ; et al.	2002-11-28
On-line cancellation of sampling mismatch in interleaved sample-and-hold circuits App 20020105339 - Nagaraj, Krishnasawamy	2002-08-08
System for increasing the bandwidth of sample-and-hold circuits in flash ADCs App 20020097177 - Nagaraj, Krishnasawamy ; et al.	2002-07-25
On-line offset cancellation in flash A/D with interpolating comparator array Grant 6,420,983 - Feygin , et al. July 16, 2	2002-07-16
Circuit design technique for increasing the bandwidth of sample-and-hold circuits in flash ADCs App 20020070886 - Nagaraj, Krishnasawamy ; et al.	2002-06-13
A Parallel Latch For High Speed Comparator Using Two Modes Of Operation App 20010052870 - Nagaraj, Krishnasawamy ; et al.	2001-12-20
MOS sample and hold circuit Grant 6,052,000 - Nagaraj April 18, 2	2000-04-18
Fir filter architecture with precise timing acquisition Grant 6,032,171 - Kiriaki , et al. February 29, 2	2000-02-29

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