Naem; Abdalla A.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Naem; Abdalla A..The latest application filed is for "self-aligned pocl.sub.3 process flow for submicron microelectronics applications using amorphized polysilicon".
- Naem; Abdalla A. - Sunnyvale CA
- Naem; Abdalla A. - Ottawa CA
| Patent | Date |
|---|---|
| Self-aligned POCL.sub.3 process flow for submicron microelectronics applications using amorphized polysilicon Grant 5,843,834 - Naem December 1, 1 | 1998-12-01 |
| Process of fabricating MOS devices having shallow source and drain junctions Grant 4,683,645 - Naguib , et al. August 4, 1 | 1987-08-04 |
| Structure and fabrication of vertically integrated CMOS logic gates Grant 4,680,609 - Calder , et al. July 14, 1 | 1987-07-14 |
| Stacked MOS transistor Grant 4,476,475 - Naem , et al. October 9, 1 | 1984-10-09 |
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