loadpatents
name:-0.015990972518921
name:-0.013544082641602
name:-0.011057138442993
Naczas; Sebastian Patent Filings

Naczas; Sebastian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Naczas; Sebastian.The latest application filed is for "fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air".

Company Profile
10.16.14
  • Naczas; Sebastian - Albany NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap
Grant 10,950,492 - Cheng , et al. March 16, 2
2021-03-16
Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size
Grant 10,811,599 - Clevenger , et al. October 20, 2
2020-10-20
Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size
Grant 10,756,260 - Clevenger , et al. A
2020-08-25
Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap
Grant 10,559,491 - Cheng , et al. Feb
2020-02-11
Fabrication Of Vertical Transport Fin Field Effect Transistors With A Self-aligned Separator And An Isolation Region With An Air
App 20190311942 - Cheng; Kangguo ;   et al.
2019-10-10
Co-fabrication Of Magnetic Device Structures With Electrical Interconnects Having Reduced Resistance Through Increased Conductor
App 20190280196 - Clevenger; Lawrence A. ;   et al.
2019-09-12
Co-fabrication Of Magnetic Device Structures With Electrical Interconnects Having Reduced Resistance Through Increased Conductor
App 20190273204 - Clevenger; Lawrence A. ;   et al.
2019-09-05
Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap
Grant 10,381,262 - Cheng , et al. A
2019-08-13
Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size
Grant 10,361,364 - Clevenger , et al.
2019-07-23
Forming sacrificial endpoint layer for deep STI recess
Grant 10,312,132 - Cheng , et al.
2019-06-04
Co-fabrication Of Magnetic Device Structures With Electrical Interconnects Having Reduced Resistance Through Increased Conductor Grain Size
App 20180366640 - Clevenger; Lawrence A. ;   et al.
2018-12-20
Fabrication Of Vertical Transport Fin Field Effect Transistors With A Self-aligned Separator And An Isolation Region With An Air Gap
App 20180308742 - Cheng; Kangguo ;   et al.
2018-10-25
Fabrication Of Vertical Transport Fin Field Effect Transistors With A Self-aligned Separator And An Isolation Region With An Air Gap
App 20180308743 - Cheng; Kangguo ;   et al.
2018-10-25
Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap
Grant 10,056,289 - Cheng , et al. August 21, 2
2018-08-21
Forming Sacrificial Endpoint Layer For Deep Sti Recess
App 20180211866 - Cheng; Kangguo ;   et al.
2018-07-26
Embedded carbon-doped germanium as stressor for germanium nFET devices
Grant 9,768,262 - Dittmar , et al. September 19, 2
2017-09-19
EMBEDDED CARBON-DOPED GERMANIUM AS STRESSOR FOR GERMANIUM nFET DEVICES
App 20160343807 - Dittmar; Jeffrey L. ;   et al.
2016-11-24
Embedded carbon-doped germanium as stressor for germanium nFET devices
Grant 9,419,138 - Dittmar , et al. August 16, 2
2016-08-16
Locally raised epitaxy for improved contact by local silicon capping during trench silicide processings
Grant 9,305,883 - Naczas , et al. April 5, 2
2016-04-05
EMBEDDED CARBON-DOPED GERMANIUM AS STRESSOR FOR GERMANIUM nFET DEVICES
App 20160093735 - Dittmar; Jeffrey L. ;   et al.
2016-03-31
Fabrication of surface textures by ion implantation for antireflection of silicon crystals
Grant 9,231,061 - Huang , et al. January 5, 2
2016-01-05
Locally Raised Epitaxy For Improved Contact By Local Silicon Capping During Trench Silicide Processings
App 20150179576 - Naczas; Sebastian ;   et al.
2015-06-25
Locally raised epitaxy for improved contact by local silicon capping during trench silicide processings
Grant 8,999,779 - Naczas , et al. April 7, 2
2015-04-07
Locally Raised Epitaxy For Improved Contact By Local Silicon Capping During Trench Silicide Processings
App 20150069531 - Naczas; Sebastian ;   et al.
2015-03-12
FinFET devices containing merged epitaxial Fin-containing contact regions
Grant 8,900,934 - Adam , et al. December 2, 2
2014-12-02
FinFET devices containing merged epitaxial Fin-containing contact regions
Grant 8,896,063 - Adam , et al. November 25, 2
2014-11-25
Finfet Devices Containing Merged Epitaxial Fin-containing Contact Regions
App 20140312419 - Adam; Thomas N. ;   et al.
2014-10-23
Finfet Devices Containing Merged Epitaxial Fin-containing Contact Regions
App 20140312420 - Adam; Thomas N. ;   et al.
2014-10-23
Fabrication Of Surface Textures By Ion Implantation For Antireflection Of Silicon Crystals
App 20120097209 - HUANG; Mengbing ;   et al.
2012-04-26

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