Nacer; Gary

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nacer; Gary.The latest application filed is for "implementation of register renaming, call-return prediction and prefetch".

Company Profile

4.9.11

Nacer; Gary - Morris Plains NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Processor with mode support Grant 10,908,909 - Moudgill , et al. February 2, 2	2021-02-02
Variable translation-lookaside buffer (TLB) indexing Grant 10,719,451 - Moudgill , et al.	2020-07-21
Computer processor with address register file Grant 10,514,915 - Moudgill , et al. Dec	2019-12-24
Computer processor that implements pre-translation of virtual addresses Grant 10,169,039 - Moudgill , et al. J	2019-01-01
Implementation Of Register Renaming, Call-return Prediction And Prefetch App 20180203703 - Moudgill; Mayan ; et al.	2018-07-19
Variable Translation-lookaside Buffer (tlb) Indexing App 20180203806 - Moudgill; Mayan ; et al.	2018-07-19
Computer processor with register direct branches and employing an instruction preload structure Grant 9,940,129 - Moudgill , et al. April 10, 2	2018-04-10
Computer processor that implements pre-translation of virtual addresses with target registers Grant 9,792,116 - Moudgill , et al. October 17, 2	2017-10-17
Processor With Advanced Operating System Support App 20160364236 - Moudgill; Mayan ; et al.	2016-12-15
Computer Processor With Address Register File App 20160313996 - Moudgill; Mayan ; et al.	2016-10-27
Computer Processor With Indirect Only Branching App 20160313995 - Moudgill; Mayan ; et al.	2016-10-27
Computer Processor With Register Direct Branches And Employing An Instruction Preload Structure App 20160314071 - Moudgill; Mayan ; et al.	2016-10-27
Computer Processor That Implements Pre-translation Of Virtual Addresses App 20160314074 - Moudgill; Mayan ; et al.	2016-10-27
Computer Processor That Implements Pre-translation Of Virtual Addresses With Target Registers App 20160314075 - Moudgill; Mayan ; et al.	2016-10-27
Power saving circuit using a clock buffer and multiple flip-flops Grant 8,471,597 - Wang , et al. June 25, 2	2013-06-25
Power Saving Circuit Using A Clock Buffer And Multiple Flip-flops App 20110254588 - Nacer; Gary ; et al.	2011-10-20
Latch-based Implementation Of A Register File For A Multi-threaded Processor App 20110241744 - Moudgill; Mayan ; et al.	2011-10-06
Multiple communication protocols with common sampling rate Grant 7,158,583 - Iancu , et al. January 2, 2	2007-01-02
Multiple communication protocols with common sampling rate App 20050008098 - Iancu, Daniel ; et al.	2005-01-13

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