Na; Duk Ju

Patent Applications and Registrations

Patent applications and USPTO patent grants for Na; Duk Ju.The latest application filed is for "semiconductor device and method of forming conductive vias by direct via reveal with organic passivation".

Company Profile

1.12.10

Na; Duk Ju - Singapore SG

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device and method of forming conductive vias by direct via reveal with organic passivation Grant 10,553,487 - Zhao , et al. Fe	2020-02-04
Semiconductor device and method of forming conductive vias by backside via reveal with CMP Grant 10,115,701 - Zhao , et al. October 30, 2	2018-10-30
Semiconductor device and method of forming conductive vias using backside via reveal and selective passivation Grant 9,865,524 - Na , et al. January 9, 2	2018-01-09
Semiconductor Device and Method of Forming Conductive Vias by Direct Via Reveal with Organic Passivation App 20170365517 - Zhao; Xing ; et al.	2017-12-21
Semiconductor device and method of forming conductive vias by direct via reveal with organic passivation Grant 9,768,066 - Zhao , et al. September 19, 2	2017-09-19
Semiconductor device and method of wafer thinning involving edge trimming and CMP Grant 9,728,415 - Chockanathan , et al. August 8, 2	2017-08-08
Integrated circuit through-substrate via system with a buffer layer and method of manufacture thereof Grant 9,281,274 - Zhao , et al. March 8, 2	2016-03-08
Semiconductor device and method of forming guard ring around conductive TSV through semiconductor wafer Grant 9,257,382 - Na , et al. February 9, 2	2016-02-09
Semiconductor Device and Method of Forming Conductive Vias by Backside Via Reveal with CMP App 20150380339 - Zhao; Xing ; et al.	2015-12-31
Semiconductor Device and Method of Forming Conductive Vias by Direct Via Reveal with Organic Passivation App 20150380310 - Zhao; Xing ; et al.	2015-12-31
Semiconductor Device And Method Of Forming Adhesive Layer Over Insulating Layer For Bonding Carrier To Mixed Surfaces Of Semiconductor Die And Encapsulant App 20150348861 - Chia; Lai Yee ; et al.	2015-12-03
Semiconductor device and method of forming adhesive layer over insulating layer for bonding carrier to mixed surfaces of semiconductor die and encapsulant Grant 9,184,104 - Chia , et al. November 10, 2	2015-11-10
Semiconductor device and method of forming through-silicon-via with sacrificial layer Grant 9,076,655 - Na , et al. July 7, 2	2015-07-07
Semiconductor Device and Method of Wafer Thinning Involving Edge Trimming and CMP App 20150179544 - Chockanathan; Vinoth Kanna ; et al.	2015-06-25
Semiconductor Device and Method of Forming Conductive Vias Using Backside Via Reveal and Selective Passivation App 20140300002 - Na; Duk Ju ; et al.	2014-10-09
Semiconductor Device and Method of Forming Through-Silicon-Via with Sacrificial Layer App 20140199838 - Na; Duk Ju ; et al.	2014-07-17
Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV Through Semiconductor Wafer App 20130299998 - Na; Duk Ju ; et al.	2013-11-14
Semiconductor device and method of forming guard ring around conductive TSV through semiconductor wafer Grant 8,558,389 - Na , et al. October 15, 2	2013-10-15
Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV through Semiconductor Wafer App 20130147055 - Na; Duk Ju ; et al.	2013-06-13

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