loadpatents
name:-0.019965887069702
name:-0.018501996994019
name:-0.00043082237243652
Myung; Junwoo Patent Filings

Myung; Junwoo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Myung; Junwoo.The latest application filed is for "semiconductor device and semiconductor package having the same".

Company Profile
0.20.17
  • Myung; Junwoo - Suwon-si KR
  • MYUNG; Junwoo - Cheonan-si KR
  • Myung; JunWoo - Kyungsangnamdo KR
  • Myung; Junwoo - Kyungsang-do KR
  • Myung; Junwoo - Ichon-si N/A KR
  • Myung; Junwoo - Jinhae-si KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Package module including a plurality of electronic components and semiconductor chip(s) embedded in a single package
Grant 11,088,060 - Lee , et al. August 10, 2
2021-08-10
Semiconductor Device And Semiconductor Package Having The Same
App 20210193555 - LEE; Seonho ;   et al.
2021-06-24
Package Module
App 20200161231 - Lee; Jaekul ;   et al.
2020-05-21
Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP
Grant 10,573,600 - Chi , et al. Feb
2020-02-25
Semiconductor Device and Method of Forming Ultra Thin Multi-Die Face-to-Face WLCSP
App 20170309572 - Chi; HeeJo ;   et al.
2017-10-26
Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP
Grant 9,735,113 - Chi , et al. August 15, 2
2017-08-15
Integrated circuit package system with molded strip protrusion
Grant 8,937,372 - Yee , et al. January 20, 2
2015-01-20
Integrated circuit package system with stacked die
Grant 8,810,019 - Yee , et al. August 19, 2
2014-08-19
Integrated circuit packaging system with an integral-interposer-structure and method of manufacture thereof
Grant 8,710,634 - Chi , et al. April 29, 2
2014-04-29
Method for manufacture of inline integrated circuit system
Grant 8,501,540 - Yee , et al. August 6, 2
2013-08-06
Integrated circuit packaging system with dual side connection and method of manufacture thereof
Grant 8,421,210 - Chi , et al. April 16, 2
2013-04-16
Semiconductor packaging system with multipart conductive pillars and method of manufacture thereof
Grant 8,304,296 - Ko , et al. November 6, 2
2012-11-06
Integrated Circuit Package System With Stacked Die
App 20120133038 - Yee; Jae Hak ;   et al.
2012-05-31
Method for manufacturing package system incorporating flip-chip assembly
Grant 8,183,089 - Choi , et al. May 22, 2
2012-05-22
Integrated circuit package system with stacked die
Grant 8,138,591 - Yee , et al. March 20, 2
2012-03-20
Semiconductor Packaging System With Multipart Conductive Pillars And Method Of Manufacture Thereof
App 20110316155 - Ko; ChanHoon ;   et al.
2011-12-29
Integrated Circuit Packaging System With Dual Side Connection And Method Of Manufacture Thereof
App 20110285009 - Chi; HeeJo ;   et al.
2011-11-24
Semiconductor Device and Method of Forming Ultra Thin Multi-Die Face-to-Face WLCSP
App 20110285007 - Chi; HeeJo ;   et al.
2011-11-24
Method For Manufacture Of Inline Integrated Circuit System
App 20110244635 - Yee; Jae Hak ;   et al.
2011-10-06
Inline integrated circuit system
Grant 7,968,981 - Yee , et al. June 28, 2
2011-06-28
Method For Manufacturing Package System Incorporating Flip-chip Assembly
App 20110092021 - Choi; A Leam ;   et al.
2011-04-21
Stacked integrated circuit package system with intra-stack encapsulation
Grant 7,871,861 - Song , et al. January 18, 2
2011-01-18
Package system incorporating a flip-chip assembly
Grant 7,859,120 - Choi , et al. December 28, 2
2010-12-28
Integrated Circuit Packaging System With An Integral-interposer-structure And Method Of Manufacture Thereof
App 20100244222 - Chi; HeeJo ;   et al.
2010-09-30
Stacked Integrated Circuit Package System With Intra-stack Encapsulation
App 20090321908 - Song; Sungmin ;   et al.
2009-12-31
Integrated Circuit Package System
App 20090283889 - Jang; Byoung Wook ;   et al.
2009-11-19
Package System Incorporating A Flip-chip Assembly
App 20090283888 - Choi; A Leam ;   et al.
2009-11-19
Inline Integrated Circuit System
App 20090258494 - Yee; Jae Hak ;   et al.
2009-10-15
Integrated Circuit Package System With Molded Strip Protrusion
App 20080230883 - Yee; Jae Hak ;   et al.
2008-09-25
Integrated Circuit Package System With Stacked Die
App 20080073770 - Yee; Jae Hak ;   et al.
2008-03-27
Spacerless Semiconductor Package Chip Stacking System
App 20070268660 - Ahn; Seungyun ;   et al.
2007-11-22

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed