loadpatents
name:-0.047772884368896
name:-0.04561185836792
name:-0.0019381046295166
MYERS; Alan M. Patent Filings

MYERS; Alan M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for MYERS; Alan M..The latest application filed is for "textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias".

Company Profile
1.43.45
  • MYERS; Alan M. - Beaverton OR
  • Myers; Alan M. - Portland OR
  • Myers; Alan M. - Menlo Park CA
  • Myers; Alan M. - Ames IA
  • Myers; Alan M. - Menlo Parks CA
  • Myers; Alan M. - Hillsboro OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Textile Patterning For Subtractively-patterned Self-aligned Interconnects, Plugs, And Vias
App 20220157619 - LIN; Kevin ;   et al.
2022-05-19
Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias
Grant 11,276,581 - Lin , et al. March 15, 2
2022-03-15
Textile Patterning For Subtractively-patterned Self-aligned Interconnects, Plugs, And Vias
App 20190287813 - LIN; Kevin ;   et al.
2019-09-19
Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias
Grant 10,366,903 - Lin , et al. July 30, 2
2019-07-30
Via self alignment and shorting improvement with airgap integration capacitance benefit
Grant 10,147,639 - Singh , et al. De
2018-12-04
Method and structure to contact tight pitch conductive layers with guided vias using alternating hardmasks and encapsulating etchstop liner scheme
Grant 10,032,643 - Chawla , et al. July 24, 2
2018-07-24
Textile Patterning For Subtractively-patterned Self-aligned Interconnects, Plugs, And Vias
App 20180158694 - LIN; Kevin ;   et al.
2018-06-07
Techniques for forming interconnects in porous dielectric materials
Grant 9,887,161 - Jezewski , et al. February 6, 2
2018-02-06
Via Self Alignment And Shorting Improvement With Airgap Integration Capacitance Benefit
App 20170250104 - SINGH; Kanwal Jit ;   et al.
2017-08-31
Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects
Grant 9,553,018 - Bristol , et al. January 24, 2
2017-01-24
Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects
Grant 9,548,269 - Myers , et al. January 17, 2
2017-01-17
Techniques For Forming Interconnects In Porous Dielectric Materials
App 20160343665 - JEZEWSKI; CHRISTOPHER J. ;   et al.
2016-11-24
Techniques for forming interconnects in porous dielectric materials
Grant 9,406,615 - Jezewski , et al. August 2, 2
2016-08-02
Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects
Grant 9,406,512 - Bristol , et al. August 2, 2
2016-08-02
Methods for forming interconnect layers having tight pitch interconnect structures
Grant 9,379,010 - Jezewski , et al. June 28, 2
2016-06-28
Diagonal Hardmasks For Improved Overlay In Fabricating Back End Of Line (beol) Interconnects
App 20160126184 - Myers; Alan M. ;   et al.
2016-05-05
Self-aligned Via And Plug Patterning With Photobuckets For Back End Of Line (beol) Interconnects
App 20160104642 - Bristol; Robert L. ;   et al.
2016-04-14
Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects
Grant 9,236,342 - Bristol , et al. January 12, 2
2016-01-12
Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects
Grant 9,209,077 - Myers , et al. December 8, 2
2015-12-08
Self-aligned Via Patterning With Multi-colored Photobuckets For Back End Of Line (beol) Interconnects
App 20150255284 - Bristol; Robert L. ;   et al.
2015-09-10
Methods For Forming Interconnect Layers Having Tight Pitch Interconnect Structures
App 20150214094 - Jezewski; Christopher J. ;   et al.
2015-07-30
Techniques For Forming Interconnects In Porous Dielectric Materials
App 20150179578 - Jezewski; Christopher J. ;   et al.
2015-06-25
Diagonal Hardmasks For Improved Overlay In Fabricating Back End Of Line (beol) Interconnects
App 20150179513 - Myers; Alan M. ;   et al.
2015-06-25
Self-aligned Via Patterning With Multi-colored Photobuckets For Back End Of Line (beol) Interconnects
App 20150171009 - Bristol; Robert L. ;   et al.
2015-06-18
Self-aligned Via And Plug Patterning With Photobuckets For Back End Of Line (beol) Interconnects
App 20150171010 - Bristol; Robert L. ;   et al.
2015-06-18
Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects
Grant 9,041,217 - Bristol , et al. May 26, 2
2015-05-26
Integrated re-combiner for electroosmotic pumps using porous frits
Grant 7,723,208 - Kim , et al. May 25, 2
2010-05-25
Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips
Grant 7,696,015 - Kim , et al. April 13, 2
2010-04-13
Methods of forming channels on an integrated circuit die and die cooling systems including such channels
Grant 7,663,230 - Ramanathan , et al. February 16, 2
2010-02-16
Orientation independent electroosmotic pump
Grant 7,645,368 - Myers , et al. January 12, 2
2010-01-12
Using external radiators with electroosmotic pumps for cooling integrated circuits
Grant 7,576,432 - Kim , et al. August 18, 2
2009-08-18
Identification and characterization of a novel alpha-amylase from maize endosperm
App 20090197323 - James; Martha G. ;   et al.
2009-08-06
Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package
Grant 7,569,426 - Myers , et al. August 4, 2
2009-08-04
Micropin heat exchanger
Grant 7,498,672 - Myers , et al. March 3, 2
2009-03-03
Identification and characterization of a novel alpha-amylase from maize endosperm
Grant 7,495,152 - James , et al. February 24, 2
2009-02-24
Methods of forming channels on an integrated circuit die and die cooling systems including such channels
App 20080185714 - Ramanathan; Shriram ;   et al.
2008-08-07
Method for manufacturing porous silicon
Grant 7,396,479 - Ravi , et al. July 8, 2
2008-07-08
Identification and characterization of a novel alpha-amylase from maize endosperm
App 20080134363 - James; Martha G. ;   et al.
2008-06-05
Methods of forming channels on an integrated circuit die and die cooling systems including such channels
Grant 7,358,201 - Ramanathan , et al. April 15, 2
2008-04-15
Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package
Grant 7,355,277 - Myers , et al. April 8, 2
2008-04-08
Packaged electroosmotic pumps using porous frits for cooling integrated circuits
App 20070278668 - Kim; Sarah E. ;   et al.
2007-12-06
Integrated Circuit Coolant Microchannel With Compliant Cover
App 20070230116 - Myers; Alan M. ;   et al.
2007-10-04
Packaged electroosmotic pumps using porous frits for cooling integrated circuits
Grant 7,274,106 - Kim , et al. September 25, 2
2007-09-25
Identification and characterization of a novel alpha-amylase from maize endosperm
Grant 7,270,988 - James , et al. September 18, 2
2007-09-18
Apparatus And Method Integrating An Electro-osmotic Pump And Microchannel Assembly Into A Die Package
App 20070190695 - Myers; Alan M. ;   et al.
2007-08-16
Integrated circuit coolant microchannel with compliant cover
Grant 7,243,705 - Myers , et al. July 17, 2
2007-07-17
Controlling electrolytically generated gas bubbles in in-plane electroosmotic pumps
App 20070009366 - Myers; Alan M. ;   et al.
2007-01-11
Orientation independent electroosmotic pump
App 20060254913 - Myers; Alan M. ;   et al.
2006-11-16
Electroosmotic pumps using porous frits for cooling integrated circuit stacks
App 20060226541 - Kim; Sarah E. ;   et al.
2006-10-12
Self-aligned electrodes contained within the trenches of an electroosmotic pump
Grant 7,105,382 - Myers , et al. September 12, 2
2006-09-12
Integrated circuit coolant microchannel with compliant cover
App 20060196646 - Myers; Alan M. ;   et al.
2006-09-07
Electroosmotic pumps using porous frits for cooling integrated circuit stacks
Grant 7,084,495 - Kim , et al. August 1, 2
2006-08-01
Using external radiators with electroosmotic pumps for cooling integrated circuits
App 20060055030 - Kim; Sarah E. ;   et al.
2006-03-16
Isolation of SU1, a starch debranching enzyme, the product of the maize gene sugary1
Grant 6,995,300 - Myers , et al. February 7, 2
2006-02-07
Using external radiators with electroosmotic pumps for cooling integrated circuits
Grant 6,992,381 - Kim , et al. January 31, 2
2006-01-31
Methods of forming channels on an integrated circuit die and die cooling systems including such channels
App 20050215058 - Ramanathan, Shriram ;   et al.
2005-09-29
Isolation Of Su1, A Starch Debranching Enzyme, The Product Of The Maize Gene Sugary1
App 20050204425 - Myers, Alan M. ;   et al.
2005-09-15
Methods of forming channels on an integrated circuit die and die cooling systems including such channels
Grant 6,919,231 - Ramanathan , et al. July 19, 2
2005-07-19
Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package
App 20050139996 - Myers, Alan M. ;   et al.
2005-06-30
Identification and characterization of a novel alpha-amylase from maize endosperm
App 20050138688 - James, Martha G. ;   et al.
2005-06-23
Self-aligned electrodes contained within the trenches of an electroosmotic pump
App 20050112816 - Myers, Alan M. ;   et al.
2005-05-26
Micropin heat exchanger
App 20050104200 - Myers, Alan M. ;   et al.
2005-05-19
Using external radiators with electroosmotic pumps for cooling integrated circuits
App 20050093138 - Kim, Sarah E. ;   et al.
2005-05-05
Electroosmotic pumps using porous frits for cooling integrated circuit stacks
App 20050085018 - Kim, Sarah E. ;   et al.
2005-04-21
Integrated re-combiner for electroosmotic pumps using porous frits
App 20050074953 - Kim, Sarah E. ;   et al.
2005-04-07
Packaged electroosmotic pumps using porous frits for cooling integrated circuits
App 20050062150 - Kim, Sarah E. ;   et al.
2005-03-24
dull1 coding for a novel starch synthase and uses thereof
App 20040049810 - Myers, Alan M. ;   et al.
2004-03-11
Dull1 coding for a starch synthase and uses thereof
Grant 6,639,125 - Myers , et al. October 28, 2
2003-10-28
Method for making a sub 100 nanometer semiconductor device using conventional lithography steps
Grant 6,596,646 - Andideh , et al. July 22, 2
2003-07-22
Method for making a sub 100 nanometer semiconductor device using conventional lithography steps
App 20030022517 - Andideh, Ebrahim ;   et al.
2003-01-30
Sidewall spacers and methods of making same
App 20020127763 - Arafa, Mohamed ;   et al.
2002-09-12
Pattern-sensitive deposition for damascene processing
Grant 6,406,995 - Hussein , et al. June 18, 2
2002-06-18
Via hole profile and method of fabrication
Grant 5,874,358 - Myers , et al. February 23, 1
1999-02-23
Anchored via connection
Grant 5,619,071 - Myers , et al. April 8, 1
1997-04-08
Via hole profile and method of fabrication
Grant 5,470,790 - Myers , et al. November 28, 1
1995-11-28

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