Murugan; Rajen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Murugan; Rajen.The latest application filed is for "integrated circuit package with emi shield".

Company Profile

0.4.9

Murugan; Rajen - Round Rock TX
Murugan; Rajen - Garland TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method, system and apparatus for quantifying the contribution of inter-symbol interference jitter on timing skew budget Grant 7,889,785 - Murugan , et al. February 15, 2	2011-02-15
Minimizing dynamic crosstalk-induced jitter timing skew Grant 7,680,226 - Murugan , et al. March 16, 2	2010-03-16
Integrated Circuit Package With Emi Shield App 20100006987 - Murugan; Rajen ; et al.	2010-01-14
Minimizing non-deterministic noise by using wavelet transform Grant 7,577,203 - Murugan , et al. August 18, 2	2009-08-18
Packaged Integrated Circuits Having Surface Mount Devices And Methods To Form Packaged Integrated Circuits App 20090166889 - Murugan; Rajen ; et al.	2009-07-02
Method, System and Apparatus for Quantifying the Contribution of Inter-Symbol Interference Jitter on Timing Skew Budget App 20090034665 - Murugan; Rajen ; et al.	2009-02-05
Method to model 3-D PCB PTH via App 20070244684 - Murugan; Rajen ; et al.	2007-10-18
Method, System And Apparatus For Controlled Impedance At Transitional Plated-Through Hole Via Sites Using Barrel Inductance Minimization App 20070217168 - Masuyama; Jinsaku ; et al.	2007-09-20
Method, system and apparatus for quantifying the contribution of inter-symbol interference jitter on timing skew budget Grant 7,251,302 - Murugan , et al. July 31, 2	2007-07-31
Minimizing dynamic crosstalk-induced jitter timing skew App 20060215792 - Murugan; Rajen ; et al.	2006-09-28
Minimizing non-deterministic noise by using wavelet transform App 20060215794 - Murugan; Rajen ; et al.	2006-09-28
Method, system and apparatus for controlled impedance at transitional plated-through hole via sites using barrel inductance minimization App 20050231927 - Masuyama, Jinsaku ; et al.	2005-10-20
Method, system and apparatus for quantifying the contribution of inter-symbol interference jitter on timing skew budget App 20050125175 - Murugan, Rajen ; et al.	2005-06-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.