loadpatents
name:-0.05298900604248
name:-0.040233135223389
name:-0.013721942901611
Murtuza; Masood Patent Filings

Murtuza; Masood

Patent Applications and Registrations

Patent applications and USPTO patent grants for Murtuza; Masood.The latest application filed is for "molded packages in a molded device".

Company Profile
13.36.44
  • Murtuza; Masood - Sugar Land TX
  • Murtuza; Masood - Stafford TX
  • Murtuza; Masood - Sugarland TX US
  • Murtuza; Masood - Sugalr Land TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
EMI shield for molded packages
Grant 11,302,648 - Murtuza , et al. April 12, 2
2022-04-12
System in a package connectors
Grant 11,257,803 - Murtuza , et al. February 22, 2
2022-02-22
Molded Packages In A Molded Device
App 20220028704 - MURTUZA; Masood ;   et al.
2022-01-27
Service module for SIP devices
Grant 11,211,369 - Murtuza , et al. December 28, 2
2021-12-28
Configurable substrate and systems
Grant 11,171,126 - Murtuza , et al. November 9, 2
2021-11-09
Method for routing bond wires in system in a package (SiP) devices
Grant 11,157,676 - Dantu , et al. October 26, 2
2021-10-26
System In A Package Modifications
App 20210143075 - CONTI; Michael Kenneth ;   et al.
2021-05-13
Circuit mounting structure and lead frame for system in package (SIP) devices
Grant 10,867,979 - Murtuza , et al. December 15, 2
2020-12-15
Emi Shield For Molded Packages
App 20200303321 - MURTUZA; Masood ;   et al.
2020-09-24
High Performance Module For Sip
App 20200243451 - FRANTZ; Gene Alan ;   et al.
2020-07-30
EMI shield for molded packages
Grant 10,714,430 - Murtuza , et al.
2020-07-14
System In A Package Connectors
App 20200066702 - MURTUZA; Masood ;   et al.
2020-02-27
Method For Routing Bond Wires In System In A Package (sip) Devices
App 20190347378 - DANTU; Neeraj Kumar Reddy ;   et al.
2019-11-14
Service Module For Sip Devices
App 20190273073 - MURTUZA; Masood ;   et al.
2019-09-05
Substrate For Use In System In A Package (sip) Devices
App 20190206779 - MURTUZA; Masood ;   et al.
2019-07-04
Substrate For System In Packaging (sip) Devices
App 20190115331 - MURTUZA; Masood ;   et al.
2019-04-18
Improved System Using System In Package Components
App 20190074268 - MURTUZA; Masood ;   et al.
2019-03-07
Substrate for system in package (SIP) devices
Grant 10,204,890 - Murtuza , et al. Feb
2019-02-12
Emi Shield For Molded Packages
App 20190027443 - MURTUZA; Masood ;   et al.
2019-01-24
Component Communications In System-in-package Systems
App 20180321313 - Troy; Kevin Michael ;   et al.
2018-11-08
Improved Substrate For System In Package (sip) Devices
App 20170287885 - MURTUZA; Masood ;   et al.
2017-10-05
Systems And Methods For Manufacturing Electronic Devices
App 20170221871 - Sheridan; Gregory Michael ;   et al.
2017-08-03
Fixture for test circuit board reliability testing
Grant 9,354,138 - Murphy , et al. May 31, 2
2016-05-31
Fixture For Test Circuit Board Reliability Testing
App 20150007662 - MURPHY; ANTHONY B. ;   et al.
2015-01-08
Leadframe With Lead Of Varying Thickness
App 20140367838 - Abbott; Donald Charles ;   et al.
2014-12-18
Method for contacting agglomerate terminals of semiconductor packages
Grant 8,716,068 - Edwards , et al. May 6, 2
2014-05-06
Method For Contacting Agglomerate Terminals Of Semiconductor Packages
App 20140038358 - Edwards; Darvin R. ;   et al.
2014-02-06
Semiconductor device having agglomerate terminals
Grant 8,643,165 - Edwards , et al. February 4, 2
2014-02-04
IC device having low resistance TSV comprising ground connection
Grant 8,436,475 - Dunne , et al. May 7, 2
2013-05-07
IC device having low resistance TSV comprising ground connection
Grant 8,431,481 - Dunne , et al. April 30, 2
2013-04-30
Method For Contacting Agglomerate Terminals Of Semiconductor Packages
App 20120211889 - EDWARDS; Darvin R. ;   et al.
2012-08-23
IC Device Having Low Resistance TSV Comprising Ground Connection
App 20120202321 - Dunne; Rajiv ;   et al.
2012-08-09
IC Device Having Low Resistance TSV Comprising Ground Connection
App 20120193814 - Dunne; Rajiv ;   et al.
2012-08-02
IC device having low resistance TSV comprising ground connection
Grant 8,178,976 - Dunne , et al. May 15, 2
2012-05-15
Packaged electronic devices with face-up die having TSV connection to leads and die pad
Grant 8,154,134 - Bonifield , et al. April 10, 2
2012-04-10
Systems and methods for post-circuitization assembly
Grant 8,039,309 - Murtuza , et al. October 18, 2
2011-10-18
Dual carrier for joining IC die or wafers to TSV wafers
Grant 8,017,439 - Takahashi , et al. September 13, 2
2011-09-13
Dual Carrier For Joining Ic Die Or Wafers To Tsv Wafers
App 20110183464 - Takahashi; Yoshimi ;   et al.
2011-07-28
Bonding IC die to TSV wafers
Grant 7,915,080 - Takahashi , et al. March 29, 2
2011-03-29
Multi layer low cost cavity substrate fabrication for PoP packages
Grant 7,883,936 - Palaniappan , et al. February 8, 2
2011-02-08
Solder cap application process on copper bump using solder powder film
Grant 7,790,597 - Chauhan , et al. September 7, 2
2010-09-07
Bonding Ic Die To Tsv Wafers
App 20100159643 - TAKAHASHI; YOSHIMI ;   et al.
2010-06-24
Multi Layer Low Cost Cavity Substrate Fabrication for POP Packages
App 20100062567 - PALANIAPPAN; Prema ;   et al.
2010-03-11
Support structure for low-k dielectrics
Grant 7,642,649 - Murtuza January 5, 2
2010-01-05
Multi layer low cost cavity substrate fabrication for pop packages
Grant 7,635,914 - Palaniappan , et al. December 22, 2
2009-12-22
Structure and Method for Reliable Solder Joints
App 20090297879 - ZENG; Kejun ;   et al.
2009-12-03
Ic Device Having Low Resistance Tsv Comprising Ground Connection
App 20090278244 - DUNNE; RAJIV ;   et al.
2009-11-12
Packaged Electronic Devices With Face-up Die Having Tsv Connection To Leads And Die Pad
App 20090278245 - BONIFIELD; THOMAS D. ;   et al.
2009-11-12
Solder Cap Application Process On Copper Bump Using Solder Powder Film
App 20090014898 - Chauhan; Satyendra S. ;   et al.
2009-01-15
Multi layer low cost cavity substrate fabrication for pop packages
App 20080283992 - Palaniappan; Prema ;   et al.
2008-11-20
Systems And Methods For Post-circuitization Assembly
App 20080280394 - Murtuza; Masood ;   et al.
2008-11-13
Adhesion by plasma conditioning of semiconductor chip
Grant 7,445,960 - Cowens , et al. November 4, 2
2008-11-04
Adhesion by plasma conditioning of semiconductor chip
App 20080050860 - Cowens; Marvin W. ;   et al.
2008-02-28
Fine pitch low cost flip chip substrate
Grant 7,323,405 - Chauhan , et al. January 29, 2
2008-01-29
Adhesion by plasma conditioning of semiconductor chip
Grant 7,319,275 - Cowens , et al. January 15, 2
2008-01-15
Adhesion by plasma conditioning of semiconductor chip surfaces
Grant 7,276,401 - Cowens , et al. October 2, 2
2007-10-02
Adhesion by plasma conditioning of semiconductor chip surfaces
Grant 7,271,494 - Cowens , et al. September 18, 2
2007-09-18
Adhesion by plasma conditioning of semiconductor chip surfaces
App 20070128881 - Cowens; Marvin W. ;   et al.
2007-06-07
Fine Pitch Low Cost Flip Chip Substrate
App 20060180919 - Chauhan; Satyendra S. ;   et al.
2006-08-17
Fine pitch low-cost flip chip substrate
Grant 7,057,284 - Chauhan , et al. June 6, 2
2006-06-06
Fine pitch low-cost flip chip substrate
App 20060033210 - Chauhan; Satyendra S. ;   et al.
2006-02-16
Adhesion by plasma conditioning of semiconductor chip surfaces
App 20050212149 - Cowens, Marvin W. ;   et al.
2005-09-29
Adhesion by plasma conditioning of semiconductor chip
App 20050161834 - Cowens, Marvin W. ;   et al.
2005-07-28
Direct attach chip scale package
App 20050140025 - Murtuza, Masood
2005-06-30
Support structure for low-k dielectrics
App 20050116345 - Murtuza, Masood
2005-06-02
Direct attach chip scale package
Grant 6,900,534 - Murtuza May 31, 2
2005-05-31
Built-up bump pad structure and method for same
Grant 6,888,255 - Murtuza , et al. May 3, 2
2005-05-03
Adhesion by plasma conditioning of semiconductor chip surfaces
Grant 6,869,831 - Cowens , et al. March 22, 2
2005-03-22
Using a supporting structure to control collapse of a die towards a die pad during a reflow process for coupling the die to the die pad
Grant 6,849,944 - Murtuza , et al. February 1, 2
2005-02-01
Using A Supporting Structure To Control Collapse Of A Die Towards A Die Pad During A Reflow Process For Coupling The Die To The Die Pad
App 20040238956 - Murtuza, Masood ;   et al.
2004-12-02
Built-up bump pad structure and method for same
App 20040238953 - Murtuza, Masood ;   et al.
2004-12-02
Two-metal layer ball grid array and chip scale package having local interconnects used in wire-bonded and flip-chip semiconductor assembly
App 20040217486 - Walter, David N. ;   et al.
2004-11-04
Two-metal layer ball grid array and chip scale package having local interconnects used in wire-bonded and flip-chip semiconductor assembly
Grant 6,717,276 - Walter , et al. April 6, 2
2004-04-06
Two-metal Layer Ball Grid Array And Chip Scale Package Having Local Interconnects Used In Wire-bonded And Flip-chip Semiconductor Assembly
App 20040046265 - Walter, David N. ;   et al.
2004-03-11
Adhesion by plasma conditioning of semiconductor chip surfaces
App 20030052414 - Cowens, Marvin W. ;   et al.
2003-03-20
Direct attach chip scale package
App 20010048157 - Murtuza, Masood
2001-12-06
Ball Grid Package With Multiple Power/ Ground Planes
App 20010013654 - KALIDAS, NAVINCHANDRA ;   et al.
2001-08-16

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