Murto; Robert William
Patent Applications and Registrations
Patent applications and USPTO patent grants for Murto; Robert William.The latest application filed is for "capacitor formed in interlevel dielectric layer".
- Murto; Robert William - McKinney TX
- Murto; Robert William - Austin TX
| Patent | Date |
|---|---|
| Capacitor Formed In Interlevel Dielectric Layer App 20100032801 - Jacobs; Jarvis Benjamin ; et al. | 2010-02-11 |
| MOS transistor gates with thin lower metal silicide and methods for making the same Grant 7,045,456 - Murto , et al. May 16, 2 | 2006-05-16 |
| MOS transistor gates with thin lower metal silicide and methods for making the same App 20050136605 - Murto, Robert William ; et al. | 2005-06-23 |
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