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name:-0.22032690048218
name:-0.083942890167236
name:-0.024569034576416
Murthy; Anand Patent Filings

Murthy; Anand

Patent Applications and Registrations

Patent applications and USPTO patent grants for Murthy; Anand.The latest application filed is for "methods of forming dislocation enhanced strain in nmos and pmos structures".

Company Profile
38.85.127
  • Murthy; Anand - Portland OR
  • Murthy; Anand - Beaverton OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Germanium-rich nanowire transistor with relaxed buffer layer
Grant 11,450,739 - Glass , et al. September 20, 2
2022-09-20
Integrated circuit structures having germanium-based channels
Grant 11,437,472 - Chouksey , et al. September 6, 2
2022-09-06
Methods of forming dislocation enhanced strain in NMOS and PMOS structures
Grant 11,411,110 - Jackson , et al. August 9, 2
2022-08-09
Methods Of Forming Dislocation Enhanced Strain In Nmos And Pmos Structures
App 20220238714 - Jackson; Michael ;   et al.
2022-07-28
Top Gate Recessed Channel Cmos Thin Film Transistor In The Back End Of Line And Methods Of Fabrication
App 20220223519 - Dewey; Gilbert ;   et al.
2022-07-14
Source or drain structures with contact etch stop layer
Grant 11,374,100 - Bomberger , et al. June 28, 2
2022-06-28
Source & Drain Dopant Diffusion Barriers For N-type Germanium Transistors
App 20220199402 - Ganguly; Koustav ;   et al.
2022-06-23
Self-aligned Interconnect Structures And Methods Of Fabrication
App 20220199468 - Jun; Kimin ;   et al.
2022-06-23
Top gate recessed channel CMOS thin film transistor in the back end of line and methods of fabrication
Grant 11,328,988 - Dewey , et al. May 10, 2
2022-05-10
Source-channel Junction For Iii-v Metal-oxide-semiconductor Field Effect Transistors (mosfets)
App 20220140076 - HUANG; Cheng-Ying ;   et al.
2022-05-05
Three-dimensional Integrated Circuits (3dics) Including Bottom Gate Mos Transistors With Monocrystalline Channel Material
App 20220093586 - Huang; Cheng-Ying ;   et al.
2022-03-24
Transistor structure with indium phosphide channel
Grant 11,276,694 - Rachmady , et al. March 15, 2
2022-03-15
Device, method and system for promoting channel stress in a NMOS transistor
Grant 11,264,501 - Mehandru , et al. March 1, 2
2022-03-01
Methods Of Forming Dislocation Enhanced Strain In Nmos And Pmos Structures
App 20220059699 - Jackson; Michael ;   et al.
2022-02-24
Source-channel junction for III-V metal-oxide-semiconductor field effect transistors (MOSFETs)
Grant 11,257,904 - Huang , et al. February 22, 2
2022-02-22
Three-dimensional integrated circuits (3DICs) including bottom gate MOS transistors with monocrystalline channel material
Grant 11,244,943 - Huang , et al. February 8, 2
2022-02-08
Three-dimensional integrated circuits (3DICs) including upper-level transistors with epitaxial source and drain material
Grant 11,164,785 - Agrawal , et al. November 2, 2
2021-11-02
Methods of forming dislocation enhanced strain in NMOS structures
Grant 11,107,920 - Jackson , et al. August 31, 2
2021-08-31
Top Gate Recessed Channel Cmos Thin Film Transistor In The Back End Of Line And Methods Of Fabrication
App 20210202378 - Dewey; Gilbert ;   et al.
2021-07-01
Three-dimensional Integrated Circuits (3dics) Including Bottom Gate Mos Transistors With Monocrystalline Channel Material
App 20210202476 - Huang; Cheng-Ying ;   et al.
2021-07-01
Three-dimensional Integrated Circuits (3dics) Including Upper-level Transistors With Epitaxial Source & Drain Material
App 20210202319 - Agrawal; Ashish ;   et al.
2021-07-01
Methods of forming doped source/drain contacts and structures formed thereby
Grant 11,004,978 - Glass , et al. May 11, 2
2021-05-11
Thin Film Transistor Structures With Regrown Source & Drain
App 20210036023 - Agrawal; Ashish ;   et al.
2021-02-04
Gate-all-around Integrated Circuit Structures Having Nanowires With Tight Vertical Spacing
App 20200357930 - GLASS; Glenn ;   et al.
2020-11-12
Silicide Structure Of An Integrated Transistor Device And Method Of Providing Same
App 20200343343 - Acton; Orb ;   et al.
2020-10-29
Source Or Drain Structures With Phosphorous And Arsenic Co-dopants
App 20200312958 - MURTHY; Anand ;   et al.
2020-10-01
Source Or Drain Structures With Vertical Trenches
App 20200312842 - KEECH; Ryan ;   et al.
2020-10-01
Source Or Drain Structures With Low Resistivity
App 20200312959 - BOMBERGER; Cory ;   et al.
2020-10-01
Gate-all-around Integrated Circuit Structures Having Embedded Gesnb Source Or Drain Structures
App 20200312960 - BOMBERGER; Cory ;   et al.
2020-10-01
Source Or Drain Structures For Germanium N-channel Devices
App 20200313001 - KEECH; Ryan ;   et al.
2020-10-01
Gate-all-around Integrated Circuit Structures Having Germanium Nanowire Channel Structures
App 20200312981 - BOMBERGER; Cory ;   et al.
2020-10-01
Gate-all-around Integrated Circuit Structures Having Source Or Drain Structures With Epitaxial Nubs
App 20200303502 - BOMBERGER; Cory ;   et al.
2020-09-24
Device, Method And System For Promoting Channel Stress In A Nmos Transistor
App 20200227558 - Mehandru; Rishabh ;   et al.
2020-07-16
Integrated Circuit Structures With Source Or Drain Dopant Diffusion Blocking Layers
App 20200219975 - BOMBERGER; Cory ;   et al.
2020-07-09
High Breakdown Voltage Structure For High Performance Gan-based Hemt And Mos Devices To Enable Gan C-mos
App 20200211842 - GLASS; Glenn ;   et al.
2020-07-02
High Conductivity Source And Drain Structure For Hemt Devices
App 20200194551 - GLASS; Glenn ;   et al.
2020-06-18
Gan Based Hemt Device Relaxed Buffer Structure On Silicon
App 20200194577 - GLASS; Glenn ;   et al.
2020-06-18
Methods Of Forming Doped Source/drain Contacts And Structures Formed Thereby
App 20200176601 - Glass; Glenn ;   et al.
2020-06-04
Methods of forming self aligned spacers for nanowire device structures
Grant 10,672,868 - Jambunathan , et al.
2020-06-02
Systems, methods and devices for isolation for subfin leakage
Grant 10,644,112 - Chu-Kung , et al.
2020-05-05
Arsenic-doped Epitaxial Source/drain Regions For Nmos
App 20200105754 - Murthy; Anand ;   et al.
2020-04-02
Gate-all-around Integrated Circuit Structures Having Underlying Dopant-diffusion Blocking Layers
App 20200105872 - GLASS; Glenn ;   et al.
2020-04-02
Gate-all-around Integrated Circuit Structures Having Vertically Discrete Source Or Drain Structures
App 20200105871 - GLASS; Glenn ;   et al.
2020-04-02
Transistor Structure With Indium Phosphide Channel
App 20200098757 - Rachmady; Willy ;   et al.
2020-03-26
Germanium-rich Nanowire Transistor With Relaxed Buffer Layer
App 20200091287 - Glass; Glenn ;   et al.
2020-03-19
Methods of forming doped source/drain contacts and structures formed thereby
Grant 10,573,750 - Glass , et al. Feb
2020-02-25
Channel Layer Formation For Iii-v Metal-oxide-semiconductor Field Effect Transistors (mosfets)
App 20200006576 - MA; Sean ;   et al.
2020-01-02
Channel Layer For Iii-v Metal-oxide-semiconductor Field Effect Transistors (mosfets)
App 20200006523 - METZ; Matthew ;   et al.
2020-01-02
Source-channel Junction For Iii-v Metal-oxide-semiconductor Field Effect Transistors (mosfets)
App 20200006480 - HUANG; Cheng-Ying ;   et al.
2020-01-02
Channel Structures With Sub-fin Dopant Diffusion Blocking Layers
App 20200006332 - BOMBERGER; Cory ;   et al.
2020-01-02
Channel Layer Formation For Iii-v Metal-oxide-semiconductor Field Effect Transistors (mosfets)
App 20200006069 - DEWEY; Gilbert ;   et al.
2020-01-02
Integrated Circuit Structures Having Germanium-based Channels
App 20200006492 - CHOUKSEY; Siddharth ;   et al.
2020-01-02
Source Or Drain Structures With Relatively High Germanium Content
App 20200006491 - BOMBERGER; Cory ;   et al.
2020-01-02
Source Or Drain Structures With Contact Etch Stop Layer
App 20200006504 - BOMBERGER; Cory ;   et al.
2020-01-02
Methods Of Forming Dislocation Enhanced Strain In Nmos Structures
App 20190334034 - JACKSON; Michael ;   et al.
2019-10-31
Methods of forming dislocation enhanced strain in NMOS structures
Grant 10,396,201 - Jackson , et al. A
2019-08-27
Systems, Methods And Devices For Isolation For Subfin Leakage
App 20190189749 - Chu-Kung; Benjamin ;   et al.
2019-06-20
Methods Of Forming Self Aligned Spacers For Nanowire Device Structures
App 20180358436 - Jambunathan; Karthik ;   et al.
2018-12-13
Methods Of Forming Doped Source/drain Contacts And Structures Formed Thereby
App 20180261696 - Glass; Glenn ;   et al.
2018-09-13
Method for improving transistor performance through reducing the salicide interface resistance
Grant 9,876,113 - Murthy , et al. January 23, 2
2018-01-23
Semiconductor transistor having a stressed channel
Grant 9,735,270 - Murthy , et al. August 15, 2
2017-08-15
Method for improving transistor performance through reducing the salicide interface resistance
Grant 9,680,016 - Murthy , et al. June 13, 2
2017-06-13
Enhanced dislocation stress transistor
Grant 9,660,078 - Weber , et al. May 23, 2
2017-05-23
Nanowire transistor with underlayer etch stops
Grant 9,614,060 - Kim , et al. April 4, 2
2017-04-04
Surface Encapsulation For Wafer Bonding
App 20170062569 - JUN; Kimin ;   et al.
2017-03-02
Method For Improving Transistor Performance Through Reducing The Salicide Interface Resistance
App 20160336447 - MURTHY; Anand ;   et al.
2016-11-17
Method For Improving Transistor Performance Through Reducing The Salicide Interface Resistance
App 20160336446 - Murthy; Anand ;   et al.
2016-11-17
Semiconductor transistor having a stressed channel
Grant 9,490,364 - Murthy , et al. November 8, 2
2016-11-08
Nanowire Transistor With Underlayer Etch Stops
App 20160284821 - Kim; Seiyon ;   et al.
2016-09-29
Method for improving transistor performance through reducing the salicide interface resistance
Grant 9,437,710 - Murthy , et al. September 6, 2
2016-09-06
Methods Of Forming Dislocation Enhanced Strain In Nmos Structures
App 20160204256 - Jackson; Michael ;   et al.
2016-07-14
Nanowire transistor with underlayer etch stops
Grant 9,385,221 - Kim , et al. July 5, 2
2016-07-05
Semiconductor Transistor Having A Stressed Channel
App 20160133747 - MURTHY; ANAND ;   et al.
2016-05-12
Enhanced Dislocation Stress Transistor
App 20160079423 - Weber; Cory E. ;   et al.
2016-03-17
Enhanced dislocation stress transistor
Grant 9,231,076 - Weber , et al. January 5, 2
2016-01-05
Method for improving transistor performance through reducing the salicide interface resistance
Grant 9,202,889 - Murthy , et al. December 1, 2
2015-12-01
Nanowire Transistor With Underlayer Etch Stops
App 20150221744 - Kim; Seiyon ;   et al.
2015-08-06
Enhanced dislocation stress transistor
Grant 9,076,814 - Weber , et al. July 7, 2
2015-07-07
Nanowire transistor with underlayer etch stops
Grant 9,064,944 - Kim , et al. June 23, 2
2015-06-23
Enhanced Dislocation Stress Transistor
App 20150155384 - Weber; Cory E. ;   et al.
2015-06-04
Method For Improving Transistor Performance Through Reducing The Salicide Interface Resistance
App 20150108546 - MURTHY; Anand ;   et al.
2015-04-23
Enhanced Dislocation Stress Transistor
App 20140284626 - Weber; Cory ;   et al.
2014-09-25
Nanowire Transistor With Underlayer Etch Stops
App 20140264280 - Kim; Seiyon ;   et al.
2014-09-18
Enhanced dislocation stress transistor
Grant 8,779,477 - Weber , et al. July 15, 2
2014-07-15
Strained transistor integration for CMOS
Grant 8,748,869 - Boyanov , et al. June 10, 2
2014-06-10
Method For Improving Transistor Performance Through Reducing The Salicide Interface Resistance
App 20130302961 - Murthy; Anand ;   et al.
2013-11-14
Method for improving transistor performance through reducing the salicide interface resistance
Grant 8,482,043 - Murthy , et al. July 9, 2
2013-07-09
Strained Transistor Integration For Cmos
App 20130153965 - Boyanov; Boyan ;   et al.
2013-06-20
Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
Grant 8,426,858 - Hattendorf , et al. April 23, 2
2013-04-23
Strained transistor integration for CMOS
Grant 8,373,154 - Boyanov , et al. February 12, 2
2013-02-12
Transistor gate electrode having conductor material layer
Grant 8,237,234 - Murthy , et al. August 7, 2
2012-08-07
Multi-component strain-inducing semiconductor regions
Grant 8,154,087 - Cook, Jr. , et al. April 10, 2
2012-04-10
Methods Of Forming Low Interface Resistance Contacts And Structures Formed Thereby
App 20120068180 - Mehandru; Rishabh ;   et al.
2012-03-22
Graded High Germanium Compound Films For Strained Semiconductor Devices
App 20120032265 - Simonelli; Danielle ;   et al.
2012-02-09
Multi-component Strain-inducing Semiconductor Regions
App 20110215375 - Cook, JR.; Ted E. ;   et al.
2011-09-08
Transistor Gate Electrode Having Conductor Material Layer
App 20110186912 - Murthy; Anand ;   et al.
2011-08-04
Transistor gate electrode having conductor material layer
Grant 7,968,957 - Murthy , et al. June 28, 2
2011-06-28
Multi-component strain-inducing semiconductor regions
Grant 7,943,469 - Cook, Jr. , et al. May 17, 2
2011-05-17
Method for improving transistor performance through reducing the salicide interface resistance
App 20110101418 - Murthy; Anand ;   et al.
2011-05-05
Strained Nmos Transistor Featuring Deep Carbon Doped Regions And Raised Donor Doped Source And Drain
App 20110068403 - Hattendorf; Michael L. ;   et al.
2011-03-24
Graded high germanium compound films for strained semiconductor devices
Grant 7,902,009 - Simonelli , et al. March 8, 2
2011-03-08
Transistor Gate Electrode Having Conductor Material Layer
App 20110018031 - Murthy; Anand ;   et al.
2011-01-27
Transistor gate electrode having conductor material layer
Grant 7,871,916 - Murthy , et al. January 18, 2
2011-01-18
Method for improving transistor performance through reducing the salicide interface resistance
App 20110006344 - Murthy; Anand ;   et al.
2011-01-13
Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
Grant 7,858,981 - Hattendorf , et al. December 28, 2
2010-12-28
CMOS transistor junction regions formed by a CVD etching and deposition sequence
Grant 7,812,394 - Murthy , et al. October 12, 2
2010-10-12
Graded high germanium compound films for strained semiconductor devices
App 20100148217 - Simonelli; Danielle ;   et al.
2010-06-17
Semiconductor device having self-aligned epitaxial source and drain extensions
Grant 7,732,285 - Sell , et al. June 8, 2
2010-06-08
Methods of forming low interface resistance contacts and structures formed thereby
App 20100109046 - Mehandru; Rishabh ;   et al.
2010-05-06
Semiconductor transistor having a stressed channel
App 20100102401 - Murthy; Anand ;   et al.
2010-04-29
Semiconductor transistor having a stressed channel
App 20100102356 - Murthy; Anand ;   et al.
2010-04-29
Formation of strain-inducing films
Grant 7,678,631 - Murthy , et al. March 16, 2
2010-03-16
Strained Transistor Integration For Cmos
App 20100044754 - Boyanov; Boyan ;   et al.
2010-02-25
Enhanced Dislocation Stress Transistor
App 20100038685 - Weber; Cory ;   et al.
2010-02-18
CMOS device and method of manufacturing same
Grant 7,663,192 - Sell , et al. February 16, 2
2010-02-16
Strained transistor integration for CMOS
Grant 7,662,689 - Boyanov , et al. February 16, 2
2010-02-16
Transistor gate electrode having conductor material layer
Grant 7,642,610 - Murthy , et al. January 5, 2
2010-01-05
Cmos Device And Method Of Manufacturing Same
App 20090321838 - Sell; Bernhard ;   et al.
2009-12-31
Transistor Gate Electrode Having Conductor Material Layer
App 20090315076 - Murthy; Anand ;   et al.
2009-12-24
Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
App 20090152601 - Hattendorf; Michael L. ;   et al.
2009-06-18
Systems And Methods To Increase Uniaxial Compressive Stress In Tri-Gate Transistors
App 20090152589 - Rakshit; Titash ;   et al.
2009-06-18
Method for fabricating a heterojunction bipolar transistor
Grant 7,517,768 - Soman , et al. April 14, 2
2009-04-14
Selective etch for patterning a semiconductor film deposited non-selectively
Grant 7,517,772 - Rachmady , et al. April 14, 2
2009-04-14
Semiconductor Transistor Having A Stressed Channel
App 20090065808 - Murthy; Anand ;   et al.
2009-03-12
Semiconductor transistor having a stressed channel
Grant 7,492,017 - Murthy , et al. February 17, 2
2009-02-17
Cmos Transistor Junction Regions Formed By A Cvd Etching And Deposition Sequence
App 20090039390 - Murthy; Anand ;   et al.
2009-02-12
Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
Grant 7,479,431 - Hattendorf , et al. January 20, 2
2009-01-20
CMOS transistor junction regions formed by a CVD etching and deposition sequence
Grant 7,479,432 - Murthy , et al. January 20, 2
2009-01-20
Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby
Grant 7,473,947 - Murthy , et al. January 6, 2
2009-01-06
Method To Deposit Silicon Film On A Substrate
App 20080237660 - Sharma; Ajay K. ;   et al.
2008-10-02
Semiconductor device having self-aligned epitaxial source and drain extensions
App 20080242037 - Sell; Bernhard ;   et al.
2008-10-02
Fabricating strained channel epitaxial source/drain transistors
Grant 7,427,775 - Murthy , et al. September 23, 2
2008-09-23
Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby
Grant 7,422,971 - Murthy , et al. September 9, 2
2008-09-09
Selective Etch For Patterning A Semiconductor Film Deposited Non-selectively
App 20080153237 - Rachmady; Willy ;   et al.
2008-06-26
MOS transistor structure and method of fabrication
Grant 7,391,087 - Murthy , et al. June 24, 2
2008-06-24
Multi-component strain-inducing semiconductor regions
App 20080124878 - Cook; Ted E. ;   et al.
2008-05-29
Selective etch for patterning a semiconductor film deposited non-selectively
Grant 7,364,976 - Rachmady , et al. April 29, 2
2008-04-29
Selective deposition to improve selectivity and structures formed thereby
Grant 7,358,547 - Murthy , et al. April 15, 2
2008-04-15
Method for improving transistor performance through reducing the salicide interface resistance
App 20080044968 - Murthy; Anand ;   et al.
2008-02-21
Formation of strain-inducing films
App 20070281411 - Murthy; Anand ;   et al.
2007-12-06
Structure and fabrication method of a selectively deposited capping layer on an epitaxially grown source drain
App 20070238236 - Cook; Ted JR. ;   et al.
2007-10-11
Selective etch for patterning a semiconductor film deposited non-selectively
App 20070224766 - Rachmady; Willy ;   et al.
2007-09-27
Method for improving transistor performance through reducing the salicide interface resistance
Grant 7,274,055 - Murthy , et al. September 25, 2
2007-09-25
Fabricating strained channel epitaxial source/drain transistors
App 20070194391 - Murthy; Anand ;   et al.
2007-08-23
Transistor gate electrode having conductor material layer
App 20070170464 - Murthy; Anand ;   et al.
2007-07-26
Fabricating strained channel epitaxial source/drain transistors
Grant 7,226,842 - Murthy , et al. June 5, 2
2007-06-05
Transistor gate electrode having conductor material layer
Grant 7,223,679 - Murthy , et al. May 29, 2
2007-05-29
CMOS transistor junction regions formed by a CVD etching and deposition sequence
App 20070105331 - Murthy; Anand ;   et al.
2007-05-10
Self aligned compact bipolar junction transistor layout and method of making same
Grant 7,202,514 - Ahmed , et al. April 10, 2
2007-04-10
CMOS transistor junction regions formed by a CVD etching and deposition sequence
Grant 7,195,985 - Murthy , et al. March 27, 2
2007-03-27
Methods for selective deposition to improve selectivity
Grant 7,129,139 - Murthy , et al. October 31, 2
2006-10-31
Semiconductor transistor having a stressed channel
App 20060151832 - Murthy; Anand ;   et al.
2006-07-13
CMOS transistor junction regions formed by a CVD etching and deposition sequence
App 20060148151 - Murthy; Anand ;   et al.
2006-07-06
Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
App 20060134872 - Hattendorf; Michael L. ;   et al.
2006-06-22
Self aligned compact bipolar junction transistor layout, and method of making same
Grant 7,064,042 - Ahmed , et al. June 20, 2
2006-06-20
Bipolar junction transistor with improved extrinsic base region and method of fabrication
App 20060113634 - Ahmed; Shahriar ;   et al.
2006-06-01
Methods for selective deposition to improve selectivity
App 20060057809 - Murthy; Anand ;   et al.
2006-03-16
Bipolar junction transistor with improved extrinsic base region and method of fabrication
Grant 7,005,359 - Ahmed , et al. February 28, 2
2006-02-28
Double-gate transistor with enhanced carrier mobility
Grant 6,974,733 - Boyanov , et al. December 13, 2
2005-12-13
Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby
App 20050272187 - Murthy, Anand ;   et al.
2005-12-08
Method for improving transistor performance through reducing the salicide interface resistance
App 20050253200 - Murthy, Anand ;   et al.
2005-11-17
Methods for selective deposition to improve selectivity
App 20050230760 - Murthy, Anand ;   et al.
2005-10-20
Transistor structure and method of fabrication
Grant 6,952,040 - Chau , et al. October 4, 2
2005-10-04
Method for improving transistor performance through reducing the salicide interface resistance
Grant 6,949,482 - Murthy , et al. September 27, 2
2005-09-27
Semiconductor transistor having a stressed channel
App 20050184311 - Murthy, Anand ;   et al.
2005-08-25
Fabricating strained channel epitaxial source/drain transistors
App 20050179066 - Murthy, Anand ;   et al.
2005-08-18
Method for fabricating a bipolar transistor base
Grant 6,927,140 - Soman , et al. August 9, 2
2005-08-09
Transistor gate electrode having conductor material layer
App 20050145944 - Murthy, Anand ;   et al.
2005-07-07
Strained transistor integration for CMOS
App 20050136584 - Boyanov, Boyan ;   et al.
2005-06-23
Methods for selective deposition to improve selectivity
App 20050133832 - Murthy, Anand ;   et al.
2005-06-23
Method For Improving Transistor Performance Through Reducing The Salicide Interface Resistance
App 20050130454 - Murthy, Anand ;   et al.
2005-06-16
Bipolar junction transistor with improved extrinsic base region and method of fabrication
App 20050104160 - Ahmed, Shahriar ;   et al.
2005-05-19
Semiconductor transistor having a stressed channel
Grant 6,885,084 - Murthy , et al. April 26, 2
2005-04-26
Semiconductor transistor having a stressed channel
Grant 6,861,318 - Murthy , et al. March 1, 2
2005-03-01
Double-gate transistor with enhanced carrier mobility
App 20040253774 - Boyanov, Boyan ;   et al.
2004-12-16
Method for fabricating a heterojunction bipolar transistor
App 20040192002 - Soman, Ravindra ;   et al.
2004-09-30
Selective deposition of smooth silicon, germanium, and silicon-germanium alloy epitaxial films
App 20040188684 - Glass, Glenn A. ;   et al.
2004-09-30
MOS transistor structure and method of fabrication
Grant 6,797,556 - Murthy , et al. September 28, 2
2004-09-28
Semiconductor transistor having a stressed channel
App 20040084735 - Murthy, Anand ;   et al.
2004-05-06
Method of forming a germanium film on a semiconductor substrate that includes the formation of a graded silicon-germanium buffer layer prior to the formation of a germanium layer
Grant 6,723,622 - Murthy , et al. April 20, 2
2004-04-20
Semiconductor transistor having a stressed channel
App 20040070035 - Murthy, Anand ;   et al.
2004-04-15
Method for fabricating a bipolar transistor base
App 20040048439 - Soman, Ravindra ;   et al.
2004-03-11
Selective NiGe wet etch for transistors with Ge body and/or Ge source/drain extensions
Grant 6,703,291 - Boyanov , et al. March 9, 2
2004-03-09
Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby
App 20040007724 - Murthy, Anand ;   et al.
2004-01-15
Self aligned compact bipolar junction transistor layout and method of making same
App 20030219939 - Ahmed, Shahriar ;   et al.
2003-11-27
Transistor structure and method of fabrication
Grant 6,653,700 - Chau , et al. November 25, 2
2003-11-25
Method of forming a germanium film on a semiconductor substrate that includes the formation of a graded silicon-germanium buffer layer prior to the formation of a germanium layer
App 20030207127 - Murthy, Anand ;   et al.
2003-11-06
Semiconductor transistor having a stressed channel
Grant 6,621,131 - Murthy , et al. September 16, 2
2003-09-16
Method Of Forming A Germanium Film On A Semiconductor Substrate That Includes The Formation Of A Graded Silicon-germanium Buffer Layer Prior To The Formation Of A Germanium Layer
App 20030157787 - Murthy, Anand ;   et al.
2003-08-21
Self Aligned Compact Bipolar Junction Transistor Layout, And Method Of Making Same
App 20030109108 - Ahmed, Shahriar ;   et al.
2003-06-12
Novel MOS transistor structure and method of fabrication
App 20030098479 - Murthy, Anand ;   et al.
2003-05-29
Semiconductor transistor having a stressed channel
App 20030080361 - Murthy, Anand ;   et al.
2003-05-01
Novel transistor structure and method of fabrication
App 20030011037 - Chau, Robert S. ;   et al.
2003-01-16
Novel transistor structure and method of fabrication
App 20030001219 - Chau, Robert S. ;   et al.
2003-01-02
Novel Mos Transistor Structure And Method Of Fabrication
App 20020190284 - MURTHY, ANAND ;   et al.
2002-12-19
Polysilicon-germanium MOSFET gate electrodes
Grant 6,373,112 - Murthy , et al. April 16, 2
2002-04-16
Semiconductor device having deposited silicon regions and a method of fabrication
Grant 6,235,568 - Murthy , et al. May 22, 2
2001-05-22
Cobalt salicidation method on a silicon germanium film
Grant 6,214,679 - Murthy , et al. April 10, 2
2001-04-10

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