Murota; Junichi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Murota; Junichi.The latest application filed is for "semiconductor device having a metal-semiconductor junction with a reduced contact resistance".

Company Profile

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Murota; Junichi - Tokyo JP
Murota; Junichi - Sendai JP
Murota, Junichi - Sendai-shi JP
Murota; Junichi - Isehara JP
Murota; Junichi - Kodaira JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of manufacturing a semiconductor device and a semiconductor manufacture system Grant 6,949,474 - Moriya , et al. September 27, 2	2005-09-27
Semiconductor device having a metal-semiconductor junction with a reduced contact resistance Grant 6,800,544 - Murota , et al. October 5, 2	2004-10-05
Semiconductor wafer and method for producing the same Grant 6,770,507 - Abe , et al. August 3, 2	2004-08-03
Semiconductor device having a metal-semiconductor junction with a reduced contact resistance App 20040033686 - Murota, Junichi ; et al.	2004-02-19
Method of manufacturing a semiconductor device and a semiconductor manufacture system App 20040007185 - Moriya, Atsushi ; et al.	2004-01-15
Semiconductor device having a metal-semiconductor junction with a reduced contact resistance Grant 6,621,145 - Murota , et al. September 16, 2	2003-09-16
Semiconductor wafer and method for producing the same App 20020182827 - Abe, Takao ; et al.	2002-12-05
Method for forming a fine structure on a surface of a semiconductor material, semiconductor materials provided with such a fine structure, and devices made of such semiconductor materials App 20020119663 - Matsuura, Takashi ; et al.	2002-08-29
MOS field-effect transistor comprising layered structure including Si layer and SiGe layer OR SiGeC layer as channel regions App 20020109135 - Murota, Junichi ; et al.	2002-08-15
Semiconductor device having a metal-semiconductor junction with a reduced contact resistance App 20020027285 - Murota, Junichi ; et al.	2002-03-07
Mosfet with strained channel layer App 20020008289 - Murota, Junichi ; et al.	2002-01-24
Laminate structure and method of manufacturing the same App 20010016247 - Matsuura, Takashi ; et al.	2001-08-23
Vapor depositing method Grant 5,705,224 - Murota , et al. January 6, 1	1998-01-06
Draft chamber Grant 4,976,815 - Hiratsuka , et al. December 11, 1	1990-12-11
Chemical vapor deposition apparatus Grant 4,503,807 - Nakayama , et al. March 12, 1	1985-03-12
Irreversible semiconductor switching element and semiconductor memory device utilizing the same Grant 4,146,902 - Tanimoto , et al. March 27, 1	1979-03-27
Insulated gate type field effect transistors Grant 4,074,300 - Sakai , et al. February 14, 1	1978-02-14

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