Mukherjee, Satyendranath

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mukherjee, Satyendranath.The latest application filed is for "high frequency high voltage silicon-on-insulator device with mask variable inversion channel and method for forming the same".

Company Profile

0.12.2

Mukherjee, Satyendranath - Yorktown Heights NY
Mukherjee; Satyendranath - Yorkstown Heights NY
Mukherjee; Satyendranath - Yorktown NY
Mukherjee; Satyendranath - Yorktown Hts. NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High frequency high voltage silicon-on-insulator device with mask variable inversion channel and method for forming the same App 20030107050 - Letavic, Theodore J. ; et al.	2003-06-12
Method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor App 20030008442 - Alok, Dev ; et al.	2003-01-09
Electrically erasable and programmable read only memory (EEPROM) having multiple overlapping metallization layers Grant 5,751,038 - Mukherjee May 12, 1	1998-05-12
Electrically erasable and programmable read only memory with non-uniform dielectric thickness Grant 5,606,521 - Kuo , et al. February 25, 1	1997-02-25
Method of manufacturing a reflective display Grant 5,486,485 - Kim , et al. January 23, 1	1996-01-23
Semiconductor device configuration with multiple HV-LDMOS transistors and a floating well circuit Grant 5,446,300 - Amato , et al. August 29, 1	1995-08-29
Vertical power MOS device with increased ruggedness and method of fabrication Grant 5,374,571 - Mukherjee , et al. December 20, 1	1994-12-20
Power integrated circuit with latch-up prevention Grant 5,243,214 - Sin , et al. September 7, 1	1993-09-07
Nonvolatile trench memory device and self-aligned method for making such a device Grant 5,229,312 - Mukherjee , et al. July 20, 1	1993-07-20
Electrically erasable and programmable read only memory with trench structure Grant 5,146,426 - Mukherjee , et al. September 8, 1	1992-09-08
MOS transistor with semi-insulating field plate and surface-adjoining top layer Grant 5,034,790 - Mukherjee July 23, 1	1991-07-23
Semiconductor switch with parallel DMOS and IGT Grant 4,939,566 - Singer , et al. July 3, 1	1990-07-03
Semiconductor switch with parallel lateral double diffused MOS transistor and lateral insulated gate transistor Grant 4,926,074 - Singer , et al. May 15, 1	1990-05-15
Protection of power integrated circuits against load voltage surges Grant 4,893,212 - Wong , et al. January 9, 1	1990-01-09

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