loadpatents
name:-0.061140060424805
name:-0.065791845321655
name:-0.33643102645874
Mueller; Silvia Melitta Patent Filings

Mueller; Silvia Melitta

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mueller; Silvia Melitta.The latest application filed is for "vector convert hexadecimal floating point to scaled decimal instruction".

Company Profile
22.65.68
  • Mueller; Silvia Melitta - Altdorf DE
  • Mueller; Silvia Melitta - St. Ingbert DE
  • Mueller; Silvia Melitta - Atdorf DE
  • Mueller; Silvia Melitta - Boeblingen DE
  • Mueller; Silvia Melitta - Altforf DE
  • Mueller; Silvia Melitta - Saarland DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Vector Convert Hexadecimal Floating Point To Scaled Decimal Instruction
App 20220276867 - Schwarz; Eric Mark ;   et al.
2022-09-01
Decimal scale and convert and split to hexadecimal floating point instruction
Grant 11,360,769 - Schwarz , et al. June 14, 2
2022-06-14
Low latency floating-point division operations
Grant 11,314,482 - Mueller , et al. April 26, 2
2022-04-26
Mixed precision floating-point multiply-add operation
Grant 11,275,561 - Mueller , et al. March 15, 2
2022-03-15
Instruction Handling For Accumulation Of Register Results In A Microprocessor
App 20220050682 - Thompto; Brian W. ;   et al.
2022-02-17
Parallel rounding for conversion from binary floating point to binary coded decimal
Grant 11,221,826 - Payer , et al. January 11, 2
2022-01-11
Compute Array Of A Processor With Mixed-precision Numerical Linear Algebra Support
App 20220004386 - Moreira; Jose E. ;   et al.
2022-01-06
Parallelized rounding for decimal floating point to binary coded decimal conversion
Grant 11,210,064 - Payer , et al. December 28, 2
2021-12-28
Compute array of a processor with mixed-precision numerical linear algebra support
Grant 11,188,328 - Moreira , et al. November 30, 2
2021-11-30
Validating microprocessor performance
Grant 11,188,304 - Ashour , et al. November 30, 2
2021-11-30
Three-dimensional lane predication for matrix operations
Grant 11,182,458 - Olsson , et al. November 23, 2
2021-11-23
Binary floating-point multiply and scale operation for compute-intensive numerical applications and apparatuses
Grant 11,182,127 - Mueller , et al. November 23, 2
2021-11-23
Floating point unit for exponential function implementation
Grant 11,163,533 - Sun , et al. November 2, 2
2021-11-02
Instruction handling for accumulation of register results in a microprocessor
Grant 11,132,198 - Thompto , et al. September 28, 2
2021-09-28
SMT processor to create a virtual vector register file for a borrower thread from a number of donated vector register files
Grant 11,132,228 - Serrano , et al. September 28, 2
2021-09-28
Mixed Precision Floating-point Multiply-add Operation
App 20210182024 - Mueller; Silvia Melitta ;   et al.
2021-06-17
Compute Array Of A Processor With Mixed-precision Numerical Linear Algebra Support
App 20210182060 - Moreira; Jose E. ;   et al.
2021-06-17
Three-dimensional Lane Predication For Matrix Operations
App 20210182359 - Olsson; Brett ;   et al.
2021-06-17
Low Latency Floating-point Division Operations
App 20210149633 - Mueller; Silvia Melitta ;   et al.
2021-05-20
Decimal load immediate instruction
Grant 10,990,390 - Bradbury , et al. April 27, 2
2021-04-27
Hybrid Floating Point Representation For Deep Learning Acceleration
App 20210109709 - Wang; Naigang ;   et al.
2021-04-15
Hybrid floating point representation for deep learning acceleration
Grant 10,963,219 - Wang , et al. March 30, 2
2021-03-30
Instruction Handling For Accumulation Of Register Results In A Microprocessor
App 20210064365 - Thompto; Brian W. ;   et al.
2021-03-04
Condition Code Anticipator For Hexadecimal Floating Point
App 20210042088 - Mueller; Silvia Melitta ;   et al.
2021-02-11
Parallel Rounding For Conversion From Binary Floating Point To Binary Coded Decimal
App 20210034329 - Payer; Stefan ;   et al.
2021-02-04
Parallelized Rounding For Decimal Floating Point To Binary Coded Decimal Conversion
App 20210034328 - Payer; Stefan ;   et al.
2021-02-04
Floating Point Unit For Exponential Function Implementation
App 20210019116 - Sun; Xiao ;   et al.
2021-01-21
Underflow/overflow detection prior to normalization
Grant 10,846,053 - Dao , et al. November 24, 2
2020-11-24
Underflow/overflow detection prior to normalization
Grant 10,846,054 - Dao , et al. November 24, 2
2020-11-24
Binary Floating-point Multiply And Scale Operation For Compute-intensive Numerical Applications And Apparatuses
App 20200310755 - Mueller; Silvia Melitta ;   et al.
2020-10-01
Hybrid Floating Point Representation For Deep Learning Acceleration
App 20200249910 - Kind Code
2020-08-06
Enhanced Low Precision Binary Floating-point Formatting
App 20200233642 - Mueller; Silvia Melitta ;   et al.
2020-07-23
Enhanced low precision binary floating-point formatting
Grant 10,656,913 - Mueller , et al.
2020-05-19
Combined residue circuit protecting binary and decimal data
Grant 10,649,738 - Carlough , et al.
2020-05-12
Decimal Load Immediate Instruction
App 20190369993 - Bradbury; Jonathan D. ;   et al.
2019-12-05
Enhanced Low Precision Binary Floating-point Formatting
App 20190369960 - Mueller; Silvia Melitta ;   et al.
2019-12-05
Shift amount correction for multiply-add
Grant 10,489,115 - Dao , et al. Nov
2019-11-26
Shift amount correction for multiply-add
Grant 10,489,114 - Dao , et al. Nov
2019-11-26
Calculation of a number of iterations
Grant 10,459,689 - Kroener , et al. Oc
2019-10-29
Decimal load immediate instruction
Grant 10,430,185 - Bradbury , et al. O
2019-10-01
Support of Wide Single Instruction Multiple Data (SIMD) Register Vectors through a Virtualization of Multithreaded Vectors in a
App 20190294585 - Serrano; Mauricio J. ;   et al.
2019-09-26
Combined Residue Circuit Protecting Binary And Decimal Data
App 20190235841 - Carlough; Steven R. ;   et al.
2019-08-01
Decimal floating point instructions to perform directly on compressed decimal floating point data
Grant 10,365,892 - Carlough , et al. July 30, 2
2019-07-30
Perform sign operation decimal instruction
Grant 10,346,134 - Bradbury , et al. July 9, 2
2019-07-09
Decimal multiply and shift instruction
Grant 10,331,408 - Bradbury , et al.
2019-06-25
Combined residue circuit protecting binary and decimal data
Grant 10,303,440 - Carlough , et al.
2019-05-28
Decimal shift and divide instruction
Grant 10,241,757 - Bradbury , et al.
2019-03-26
Decimal shift and divide instruction
Grant 10,235,137 - Bradbury , et al.
2019-03-19
Decimal load immediate instruction
Grant 10,235,170 - Bradbury , et al.
2019-03-19
Perform sign operation decimal instruction
Grant 10,175,946 - Bradbury , et al. J
2019-01-08
Decimal multiply and shift instruction
Grant 10,127,015 - Bradbury , et al. November 13, 2
2018-11-13
Combined Residue Circuit Protecting Binary And Decimal Data
App 20180203672 - Carlough; Steven R. ;   et al.
2018-07-19
Decimal Floating Point Instructions To Perform Directly On Compressed Decimal Floating Point Data
App 20180203670 - Carlough; Steven R. ;   et al.
2018-07-19
Binary fused multiply-add floating-point calculations
Grant 9,959,093 - Klein , et al. May 1, 2
2018-05-01
Binary fused multiply-add floating-point calculations
Grant 9,952,829 - Klein , et al. April 24, 2
2018-04-24
Checking arithmetic computations
Grant 9,940,199 - Carlough , et al. April 10, 2
2018-04-10
Decimal Shift And Divide Instruction
App 20180095724 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Decimal Multiply And Shift Instruction
App 20180095721 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Perform Sign Operation Decimal Instruction
App 20180095726 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Decimal Load Immediate Instruction
App 20180095757 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Decimal Shift And Divide Instruction
App 20180095725 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Decimal Load Immediate Instruction
App 20180095755 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Perform Sign Operation Decimal Instruction
App 20180095727 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Decimal Multiply And Shift Instruction
App 20180095723 - Bradbury; Jonathan D. ;   et al.
2018-04-05
Floating point instruction with selectable comparison attributes
Grant 9,785,435 - Bradbury , et al. October 10, 2
2017-10-10
Binary Fused Multiply-add Floating-point Calculations
App 20170220318 - Klein; Michael ;   et al.
2017-08-03
Binary Fused Multiply-add Floating-point Calculations
App 20170220319 - Klein; Michael ;   et al.
2017-08-03
Decimal floating-point quantum exception detection
Grant 9,244,654 - Cowlishaw , et al. January 26, 2
2016-01-26
Checking Arithmetic Computations
App 20160019028 - Carlough; Steven R. ;   et al.
2016-01-21
Shift Amount Correction For Multiply-add
App 20150378678 - Dao; Son T. ;   et al.
2015-12-31
Shift Amount Correction For Multiply-add
App 20150378677 - Dao; Son T. ;   et al.
2015-12-31
Underflow/overflow Detection Prior To Normalization
App 20150378680 - Dao; Son T. ;   et al.
2015-12-31
Underflow/overflow Detection Prior To Normalization
App 20150378679 - Dao; Son T. ;   et al.
2015-12-31
Calculation Of A Number Of Iterations
App 20150363170 - Kroener; Klaus M. ;   et al.
2015-12-17
Range check based lookup tables
Grant 8,954,485 - Carlough , et al. February 10, 2
2015-02-10
Range check based lookup tables
Grant 8,914,431 - Carlough , et al. December 16, 2
2014-12-16
Reuse of rounder for fixed conversion of log instructions
Grant 8,626,807 - Boersma , et al. January 7, 2
2014-01-07
Distributed residue-checking of a floating point unit
Grant 8,566,383 - Dao , et al. October 22, 2
2013-10-22
Decimal floating point mechanism and process of multiplication without resultant leading zero detection
Grant 8,495,124 - Carlough , et al. July 23, 2
2013-07-23
Range Check Based Lookup Tables
App 20130173681 - Carlough; Steven R. ;   et al.
2013-07-04
Range Check Based Lookup Tables
App 20130173683 - Carlough; Steven R. ;   et al.
2013-07-04
Efficient forcing of corner cases in a floating point rounder
Grant 8,352,531 - Boersma , et al. January 8, 2
2013-01-08
Shifter with all-one and all-zero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result
Grant 8,332,453 - Boersma , et al. December 11, 2
2012-12-11
Decimal Floating-Point Quantum Exception Detection
App 20120278374 - Cowlishaw; Michael F. ;   et al.
2012-11-01
Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units
Grant 8,229,989 - Dhong , et al. July 24, 2
2012-07-24
Decimal floating-pointing quantum exception detection
Grant 8,219,605 - Cowlishaw , et al. July 10, 2
2012-07-10
Reducing the latency of sum-addressed shifters
Grant 8,166,085 - Dhong , et al. April 24, 2
2012-04-24
High speed adder design for a multiply-add based floating point unit
Grant 8,131,795 - Dhong , et al. March 6, 2
2012-03-06
Decimal Floating Point Mechanism and Process of Multiplication without Resultant Leading Zero Detection
App 20110320512 - Carlough; Steven R. ;   et al.
2011-12-29
Decimal Floating-pointing Quantum Exception Detection
App 20110296229 - COWLISHAW; MICHAEL F. ;   et al.
2011-12-01
Reuse Of Rounder For Fixed Conversion Of Log Instructions
App 20100174764 - Boersma; Maarten ;   et al.
2010-07-08
Shifter With All-one And All-zero Detection
App 20100146023 - Boersma; Maarten ;   et al.
2010-06-10
Distributed Residue-checking Of A Floating Point Unit
App 20100100578 - Dao; Son Trong ;   et al.
2010-04-22
High Speed Adder Design For A Multiply-add Based Floating Point Unit
App 20090077155 - Dhong; Sang Hoo ;   et al.
2009-03-19
High speed adder design for a multiply-add based floating point unit
Grant 7,490,119 - Dhong , et al. February 10, 2
2009-02-10
Method for Controlling Rounding Modes in Single Instruction Multiple Data (SIMD) Floating-Point Units
App 20090024684 - Dhong; Sang Hoo ;   et al.
2009-01-22
Methods and apparatus for performing multi-value range checks
Grant 7,469,265 - Dhong , et al. December 23, 2
2008-12-23
Floating point unit with fused multiply add and method for calculating a result with a floating point unit
Grant 7,461,117 - Trong , et al. December 2, 2
2008-12-02
Apparatus for controlling rounding modes in single instruction multiple data (SIMD) floating-point units
Grant 7,447,725 - Dhong , et al. November 4, 2
2008-11-04
Processor Having Efficient Function Estimate Instructions
App 20080263336 - Dhong; Sang Hoo ;   et al.
2008-10-23
Apparatus for Reducing the Latency of Sum-Addressed Shifters
App 20080195684 - Dhong; Sang Hoo ;   et al.
2008-08-14
Processor having efficient function estimate instructions
Grant 7,406,589 - Dhong , et al. July 29, 2
2008-07-29
Apparatus and method for reducing the latency of sum-addressed shifters
Grant 7,392,270 - Dhong , et al. June 24, 2
2008-06-24
High performance implementation of exponent adjustment in a floating point design
Grant 7,290,023 - Dhong , et al. October 30, 2
2007-10-30
Protecting one-hot logic against short-circuits during power-on
Grant 7,245,159 - Dhong , et al. July 17, 2
2007-07-17
Leakage current reduction system and method
Grant 7,237,163 - Dhong , et al. June 26, 2
2007-06-26
Byte Execution Unit for Carrying Out Byte Instructions in a Processor
App 20070061553 - Dhong; Sang Hoo ;   et al.
2007-03-15
Byte execution unit for carrying out byte instructions in a processor
Grant 7,149,877 - Dhong , et al. December 12, 2
2006-12-12
Processor having efficient function estimate instructions
App 20060259745 - Dhong; Sang Hoo ;   et al.
2006-11-16
Power saving in FPU with gated power based on opcodes and data
Grant 7,137,021 - Dhong , et al. November 14, 2
2006-11-14
Floating point unit with fused multiply add and method for calculating a result with a floating point unit
App 20060184601 - Trong; Son Dao ;   et al.
2006-08-17
Power saving in a floating point unit using a multiplier and aligner bypass
Grant 7,058,830 - Dhong , et al. June 6, 2
2006-06-06
Using a leading-sign anticipator circuit for detecting sticky-bit information
App 20060101108 - Dhong; Sang Hoo ;   et al.
2006-05-11
Leakage current reduction system and method
App 20060101315 - Dhong; Sang Hoo ;   et al.
2006-05-11
Apparatus for controlling rounding modes in single instruction multiple data (SIMD) floating-point units
App 20060101107 - Dhong; Sang Hoo ;   et al.
2006-05-11
Construction of a folded leading zero anticipator
App 20060053190 - Dhong; Sang Hoo ;   et al.
2006-03-09
Alignment shifter supporting multiple precisions
App 20060031272 - Dhong; Sang Hoo ;   et al.
2006-02-09
Apparatus and method for reducing the latency of sum-addressed shifters
App 20060026223 - Dhong; Sang Hoo ;   et al.
2006-02-02
Protecting one-hot logic against short-curcuits during power-on
App 20060012399 - Dhong; Sang Hoo ;   et al.
2006-01-19
High speed adder design for a multiply-add based floating point unit
App 20050131981 - Dhong, Sang Hoo ;   et al.
2005-06-16
High performance implementation of exponent adjustment in a floating point design
App 20050114422 - Dhong, Sang Hoo ;   et al.
2005-05-26
Methods and apparatus for performing multi-value range checks
App 20050086279 - Dhong, Sang Hoo ;   et al.
2005-04-21
Byte execution unit for carrying out byte instructions in a processor
App 20050015576 - Dhong, Sang Hoo ;   et al.
2005-01-20
Power saving in FPU with gated power based on opcodes and data
App 20040230849 - Dhong, Sang Hoo ;   et al.
2004-11-18
Power saving in a floating point unit using a multiplier and aligner bypass
App 20040186870 - Dhong, Sang Hoo ;   et al.
2004-09-23

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed