Mueller; Antje

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mueller; Antje.The latest application filed is for "layout effect characterization for integrated circuits".

Company Profile

0.11.10

Mueller; Antje - Holzgerlingen DE
Mueller; Antje - Boeblingen DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Layout effect characterization for integrated circuits Grant 10,114,914 - Eckert , et al. October 30, 2	2018-10-30
Layout Effect Characterization For Integrated Circuits App 20180107771 - Eckert; Martin ; et al.	2018-04-19
Layout effect characterization for integrated circuits Grant 9,904,748 - Eckert , et al. February 27, 2	2018-02-27
Layout effect characterization for integrated circuits Grant 9,740,813 - Eckert , et al. August 22, 2	2017-08-22
Charge recycling between power domains of integrated circuits Grant 8,984,314 - Barowski , et al. March 17, 2	2015-03-17
Charge recycling between power domains of integrated circuits Grant 8,972,758 - Barowski , et al. March 3, 2	2015-03-03
Charge Recycling Between Power Domains of Integrated Circuits App 20140082386 - Barowski; Harry ; et al.	2014-03-20
Method for controlling the supply voltage for an integrated circuit and an apparatus with a voltage regulation module and an integrated circuit Grant 8,471,624 - Bonsels , et al. June 25, 2	2013-06-25
Charge Recycling Between Power Domains of Integrated Circuits App 20130138978 - Barowski; Harry ; et al.	2013-05-30
Method For Controlling The Supply Voltage For An Integrated Circuit And An Apparatus With A Voltage Regulation Module And An Integrated Circuit App 20130113545 - Bonsels; Stefan ; et al.	2013-05-09
Method For Controlling The Supply Voltage For An Integrated Circuit And An Apparatus With A Voltage Regulation Module And An Integrated Circuit App 20120218031 - Bonsels; Stefan ; et al.	2012-08-30
Method and system for pipeline reduction Grant 7,844,799 - Leenstra , et al. November 30, 2	2010-11-30
Method For Controlling The Supply Voltage For An Integrated Circuit And An Apparatus With A Voltage Regulation Module And An Integrated Circuit App 20100013446 - Bonsels; Stefan ; et al.	2010-01-21
Hierarchical priority filter with integrated serialization for determining the entry with the highest priority in a buffer memory Grant 6,725,332 - Leenstra , et al. April 20, 2	2004-04-20
Storage cell with integrated soft error detection and correction Grant 6,668,341 - Krauch , et al. December 23, 2	2003-12-23
Method and system for pipeline reduction App 20030208672 - Leenstra, Jens ; et al.	2003-11-06
Hierarchical priority filter with integrated serialization App 20010029557 - Leenstra, Jens ; et al.	2001-10-11

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