| Patent | Date |
|---|
System And Method To Implement Masked Vector Instructions
App 20220179653 - MOUDGILL; Mayan ; et al. | 2022-06-09 |
Device And Method For Hardware-efficient Adaptive Calculation Of Floating-point Trigonometric Functions Using Coordinate Rotate Digital Computer (cordic)
App 20220137925 - MOUDGILL; Mayan ; et al. | 2022-05-05 |
Device And Method For Calculating Elementary Functions Using Successive Cumulative Rotation Circuit
App 20220129262 - MOUDGILL; Mayan ; et al. | 2022-04-28 |
System And Architecture Neural Network Accelerator Including Filter Circuit
App 20220108148 - MOUDGILL; Mayan ; et al. | 2022-04-07 |
Implementing atomic primitives using cache line locking
Grant 11,157,407 - Moudgill , et al. October 26, 2 | 2021-10-26 |
System And Architecture Including Processor, Accelerator And Their Operations
App 20210319283 - MOUDGILL; Mayan ; et al. | 2021-10-14 |
System And Architecture Including Processor And Neural Network Accelerator
App 20210319284 - MOUDGILL; Mayan ; et al. | 2021-10-14 |
System and architecture of neural network accelerator
Grant 11,144,815 - Moudgill , et al. October 12, 2 | 2021-10-12 |
Vector Instruction With Precise Interrupts And/or Overwrites
App 20210311735 - MOUDGILL; Mayan ; et al. | 2021-10-07 |
Vector processor to operate on variable length vectors using graphics processing instructions
Grant 10,922,267 - Moudgill , et al. February 16, 2 | 2021-02-16 |
Processor with mode support
Grant 10,908,909 - Moudgill , et al. February 2, 2 | 2021-02-02 |
System And Architecture Of Neural Network Accelerator
App 20200394495 - MOUDGILL; Mayan ; et al. | 2020-12-17 |
Vector processor to operate on variable length vectors with out-of-order execution
Grant 10,846,259 - Moudgill , et al. November 24, 2 | 2020-11-24 |
Vector processor configured to operate on variable length vectors using one or more complex arithmetic instructions
Grant 10,824,586 - Moudgill , et al. November 3, 2 | 2020-11-03 |
Vector processor configured to operate on variable length vectors using instructions that change element widths
Grant 10,733,140 - Moudgill , et al. | 2020-08-04 |
Variable translation-lookaside buffer (TLB) indexing
Grant 10,719,451 - Moudgill , et al. | 2020-07-21 |
Computer processor with address register file
Grant 10,514,915 - Moudgill , et al. Dec | 2019-12-24 |
Vector processor configured to operate on variable length vectors using digital signal processing instructions
Grant 10,339,095 - Moudgill , et al. | 2019-07-02 |
Vector processor configured to operate on variable length vectors with asymmetric multi-threading
Grant 10,339,094 - Moudgill , et al. | 2019-07-02 |
Computer processor that implements pre-translation of virtual addresses
Grant 10,169,039 - Moudgill , et al. J | 2019-01-01 |
Implementation Of Register Renaming, Call-return Prediction And Prefetch
App 20180203703 - Moudgill; Mayan ; et al. | 2018-07-19 |
Variable Translation-lookaside Buffer (tlb) Indexing
App 20180203806 - Moudgill; Mayan ; et al. | 2018-07-19 |
Floating Point Instruction Format With Embedded Rounding Rule
App 20180173527 - Moudgill; Mayan ; et al. | 2018-06-21 |
Implementing Atomic Primitives Using Cache Line Locking
App 20180173625 - Moudgill; Mayan ; et al. | 2018-06-21 |
Vector processor configured to operate on variable length vectors using implicitly typed instructions
Grant 9,959,246 - Moudgill , et al. May 1, 2 | 2018-05-01 |
Computer processor with register direct branches and employing an instruction preload structure
Grant 9,940,129 - Moudgill , et al. April 10, 2 | 2018-04-10 |
Vector processor configured to operate on variable length vectors using instructions to combine and split vectors
Grant 9,910,824 - Moudgill , et al. March 6, 2 | 2018-03-06 |
Computer processor that implements pre-translation of virtual addresses with target registers
Grant 9,792,116 - Moudgill , et al. October 17, 2 | 2017-10-17 |
Processor With Advanced Operating System Support
App 20160364236 - Moudgill; Mayan ; et al. | 2016-12-15 |
Computer Processor With Address Register File
App 20160313996 - Moudgill; Mayan ; et al. | 2016-10-27 |
Computer Processor With Indirect Only Branching
App 20160313995 - Moudgill; Mayan ; et al. | 2016-10-27 |
Computer Processor That Implements Pre-translation Of Virtual Addresses With Target Registers
App 20160314075 - Moudgill; Mayan ; et al. | 2016-10-27 |
Computer Processor With Register Direct Branches And Employing An Instruction Preload Structure
App 20160314071 - Moudgill; Mayan ; et al. | 2016-10-27 |
Computer Processor That Implements Pre-translation Of Virtual Addresses
App 20160314074 - Moudgill; Mayan ; et al. | 2016-10-27 |
Vector Processor Configured To Operate On Variable Length Vectors Using Instructions To Combine And Split Vectors
App 20160224346 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors With Asymmetric Multi-threading
App 20160224509 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors Using Implicitly Typed Instructions
App 20160224511 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors Using Digital Signal Processing Instructions
App 20160224344 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors With Register Renaming
App 20160224514 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors Using Instructions That Change Element Widths
App 20160224345 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors Using One Or More Complex Arithmetic Instructions
App 20160224340 - Moudgill; Mayan ; et al. | 2016-08-04 |
Monolithic Vector Processor Configured To Operate On Variable Length Vectors
App 20160224512 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors Using Graphics Processing Instructions
App 20160224510 - Moudgill; Mayan ; et al. | 2016-08-04 |
Vector Processor Configured To Operate On Variable Length Vectors With Out-of-order Execution
App 20160224513 - Moudgill; Mayan ; et al. | 2016-08-04 |
Implementation of arbitrary galois field arithmetic on a programmable processor
Grant 9,146,708 - Moudgill September 29, 2 | 2015-09-29 |
Method and system for parallelization of pipelined computations
Grant 9,110,726 - Kotlyar , et al. August 18, 2 | 2015-08-18 |
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,959,315 - Hokenek , et al. February 17, 2 | 2015-02-17 |
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,918,627 - Hokenek , et al. December 23, 2 | 2014-12-23 |
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,892,849 - Hokenek , et al. November 18, 2 | 2014-11-18 |
Software implementation of matrix inversion in a wireless communication system
Grant 8,819,099 - Sima , et al. August 26, 2 | 2014-08-26 |
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,762,688 - Hokenek , et al. June 24, 2 | 2014-06-24 |
Haltable and restartable DMA engine
Grant 8,732,382 - Moudgill , et al. May 20, 2 | 2014-05-20 |
Method for enabling multi-processor synchronization
Grant 8,539,188 - Moudgill , et al. September 17, 2 | 2013-09-17 |
Power saving circuit using a clock buffer and multiple flip-flops
Grant 8,471,597 - Wang , et al. June 25, 2 | 2013-06-25 |
Method and instruction set including register shifts and rotates for data processing
Grant 8,407,456 - Moudgill March 26, 2 | 2013-03-26 |
Accelerating traceback on a signal processor
Grant 8,171,265 - Moudgill , et al. May 1, 2 | 2012-05-01 |
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20120096243 - Hokenek; Erdem ; et al. | 2012-04-19 |
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,074,051 - Hokenek , et al. December 6, 2 | 2011-12-06 |
Method for recognition of acyclic instruction patterns
Grant 8,056,064 - Moudgill , et al. November 8, 2 | 2011-11-08 |
Power Saving Circuit Using A Clock Buffer And Multiple Flip-flops
App 20110254588 - Nacer; Gary ; et al. | 2011-10-20 |
Haltable And Restartable Dma Engine
App 20110252211 - Moudgill; Mayan ; et al. | 2011-10-13 |
Latch-based Implementation Of A Register File For A Multi-threaded Processor
App 20110241744 - Moudgill; Mayan ; et al. | 2011-10-06 |
Implementation Of Arbitrary Galois Field Arithmetic On A Programmable Processor
App 20110153701 - Moudgill; Mayan | 2011-06-23 |
Microprocessor including register renaming unit for renaming target registers in an instruction with physical registers in a register sub-file
Grant 7,895,413 - Moudgill February 22, 2 | 2011-02-22 |
Software Implementation Of Matrix Inversion In A Wireless Communication System
App 20100293210 - Sima; Mihai ; et al. | 2010-11-18 |
Accelerating Traceback On A Signal Processor
App 20100274989 - Moudgill; Mayan ; et al. | 2010-10-28 |
Method Of Encoding Using Instruction Field Overloading
App 20100241834 - Moudgill; Mayan | 2010-09-23 |
Processor having parallel vector multiply and reduce operations with sequential semantics
Grant 7,797,363 - Hokenek , et al. September 14, 2 | 2010-09-14 |
Method And Instruction Set Including Register Shifts And Rotates For Data Processing
App 20100228938 - Moudgill; Mayan | 2010-09-09 |
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20100199075 - Hokenek; Erdem ; et al. | 2010-08-05 |
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20100199073 - Hokenek; Erdem ; et al. | 2010-08-05 |
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20100122068 - Hokenek; Erdem ; et al. | 2010-05-13 |
Method And System For Parallelization Of Pipelined Computations
App 20100115527 - Kotlyar; Vladimir ; et al. | 2010-05-06 |
Method To Accelerate Null-terminated String Operations
App 20100031007 - MOUDGILL; Mayan | 2010-02-04 |
Data File Storing Multiple Data Types With Controlled Data Access
App 20090276432 - Hokenek; Erdem ; et al. | 2009-11-05 |
Method For Enabling Multi-processor Synchronization
App 20090193279 - MOUDGILL; Mayan ; et al. | 2009-07-30 |
Method Implementing Periodic Behaviors Using A Single Reference
App 20090160518 - Moudgill; Mayan | 2009-06-25 |
Multi-threaded processor having compound instruction and operation formats
Grant 7,475,222 - Glossner , et al. January 6, 2 | 2009-01-06 |
Vector register file with arbitrary vector addressing
Grant 7,467,288 - Glossner, III , et al. December 16, 2 | 2008-12-16 |
Method of Renaming Registers in Register File and Microprocessor Thereof
App 20080209166 - Moudgill; Mayan | 2008-08-28 |
Method For Recognition Of Acyclic Instruction Patterns
App 20080127148 - Moudgill; Mayan ; et al. | 2008-05-29 |
System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form
Grant 7,356,673 - Altman , et al. April 8, 2 | 2008-04-08 |
Digital signal processor with cascaded SIMD organization
Grant 7,308,559 - Glossner, III , et al. December 11, 2 | 2007-12-11 |
Doppler compensated receiver
Grant 7,209,529 - Iancu , et al. April 24, 2 | 2007-04-24 |
Method for recognition of full-word saturating addition and subtraction
Grant 7,171,438 - Moudgill , et al. January 30, 2 | 2007-01-30 |
Method of renaming registers in register file and microprocessor thereof
App 20060294342 - Moudgill; Mayan | 2006-12-28 |
Method of renaming registers in register file and microprocessor thereof
Grant 7,120,780 - Moudgill October 10, 2 | 2006-10-10 |
Rake receiver with multi-path interference accommodation
Grant 7,058,117 - Iancu , et al. June 6, 2 | 2006-06-06 |
Turbo decoder using parallel processing
Grant 7,055,102 - Lu , et al. May 30, 2 | 2006-05-30 |
Rake Receiver With Multi-path Interference Accommodation
App 20060104336 - Iancu; Daniel ; et al. | 2006-05-18 |
Processor having compound instruction and operation formats
App 20060095717 - Glossner; C. John ; et al. | 2006-05-04 |
Multithreaded processor with multiple concurrent pipelines per thread
App 20060095729 - Hokenek; Erdem ; et al. | 2006-05-04 |
Processor having parallel vector multiply and reduce operations with sequential semantics
App 20060041610 - Hokenek; Erdem ; et al. | 2006-02-23 |
Ultra low power adder with sum synchronization
Grant 6,990,509 - Hokenek , et al. January 24, 2 | 2006-01-24 |
Method and apparatus for multithreaded cache with cache eviction based on thread identifier
Grant 6,990,557 - Hokenek , et al. January 24, 2 | 2006-01-24 |
Inter-thread communications using shared interrupt register
Grant 6,971,103 - Hokenek , et al. November 29, 2 | 2005-11-29 |
Multithreaded processor with efficient processing for convergence device applications
Grant 6,968,445 - Hokenek , et al. November 22, 2 | 2005-11-22 |
Fast transmitter based on table lookup
Grant 6,956,910 - Lu , et al. October 18, 2 | 2005-10-18 |
Method and apparatus for thread-based memory access in a multithreaded processor
Grant 6,925,643 - Hokenek , et al. August 2, 2 | 2005-08-02 |
Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy
Grant 6,912,623 - Hokenek , et al. June 28, 2 | 2005-06-28 |
Method and apparatus for register file port reduction in a multithreaded processor
Grant 6,904,511 - Hokenek , et al. June 7, 2 | 2005-06-07 |
Doppler compensated receiver
App 20050007277 - Iancu, Daniel ; et al. | 2005-01-13 |
Method and apparatus for token triggered multithreading
Grant 6,842,848 - Hokenek , et al. January 11, 2 | 2005-01-11 |
Method for recognition of full-word saturating addition and subtraction
App 20040181568 - Moudgill, Mayan ; et al. | 2004-09-16 |
Turbo decoder using parallel processing
App 20040111659 - Lu, Jin ; et al. | 2004-06-10 |
Vector register file with arbitrary vector addressing
App 20040103262 - Glossner, Clair John III ; et al. | 2004-05-27 |
Fast transmitter based on table lookup
App 20040096011 - Lu, Jin ; et al. | 2004-05-20 |
Digital signal processor with cascaded SIMD organization
App 20040078554 - Glossner, Clair John III ; et al. | 2004-04-22 |
Method and apparatus for token triggered multithreading
App 20040073781 - Hokenek, Erdem ; et al. | 2004-04-15 |
Method and apparatus for high speed cross-thread interrupts in a multithreaded processor
App 20040073910 - Hokenek, Erdem ; et al. | 2004-04-15 |
Method and apparatus for thread-based memory access in a multithreaded processor
App 20040073772 - Hokenek, Erdem ; et al. | 2004-04-15 |
Method and apparatus for register file port reduction in a multithreaded processor
App 20040073779 - Hokenek, Erdem ; et al. | 2004-04-15 |
Method and apparatus for reducing encoding needs and ports to shared resources in a processor
Grant 6,704,855 - Altman , et al. March 9, 2 | 2004-03-09 |
Vector register file with arbitrary vector addressing
Grant 6,665,790 - Glossner, III , et al. December 16, 2 | 2003-12-16 |
Method and apparatus for multithreaded cache with cache eviction based on thread identifier
App 20030225975 - Hokenek, Erdem ; et al. | 2003-12-04 |
Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy
App 20030225976 - Hokenek, Erdem ; et al. | 2003-12-04 |
Ultra low power adder with sum synchronization
App 20030172102 - Hokenek, Erdem ; et al. | 2003-09-11 |
Method of renaming registers in register file and microprocessor thereof
App 20030167388 - Moudgill, Mayan | 2003-09-04 |
Multithreaded processor with efficient processing for convergence device applications
App 20030120901 - Hokenek, Erdem ; et al. | 2003-06-26 |
System and method including distributed instruction buffers holding a second instruction form
App 20020161987 - Altman, Erik R. ; et al. | 2002-10-31 |
Power control of a processor using hardware structures controlled by a compiler with an accumulated instruction profile
App 20020112193 - Altman, Erik R. ; et al. | 2002-08-15 |
Multiple issue static speculative instruction scheduling with path tag and precise interrupt handling
Grant 6,032,244 - Moudgill February 29, 2 | 2000-02-29 |
Processor with compiler-allocated, variable length intermediate storage
Grant 5,860,138 - Engebretsen , et al. January 12, 1 | 1999-01-12 |
Method and apparatus for reordering memory operations in a processor
Grant 5,758,051 - Moreno , et al. May 26, 1 | 1998-05-26 |
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