Motoyama; Koichi
Patent Applications and Registrations
Patent applications and USPTO patent grants for Motoyama; Koichi.The latest application filed is for "magneto-resistive random access memory with laterally-recessed free layer".
Company Profile
44.70.75
- Motoyama; Koichi - Clifton Park NY
- Motoyama; Koichi - Albany NY US
- Motoyama; Koichi - Kawasaki-shi JP
- Motoyama; Koichi - Kanagawa JP
- Motoyama; Koichi - Kawasaki JP
- Motoyama; Koichi - Tokyo JP
Patent Activity
| Patent | Date |
|---|---|
| Interconnects having air gap spacers Grant 11,430,690 - Cheng , et al. August 30, 2 | 2022-08-30 |
| Subtractive back-end-of-line vias Grant 11,410,879 - Park , et al. August 9, 2 | 2022-08-09 |
| Pillar bump with noble metal seed layer for advanced heterogeneous integration Grant 11,380,641 - Maniscalco , et al. July 5, 2 | 2022-07-05 |
| Magneto-resistive Random Access Memory With Laterally-recessed Free Layer App 20220190235 - van der Straten; Oscar ; et al. | 2022-06-16 |
| Beol Metallization Formation App 20220189826 - Park; Chanro ; et al. | 2022-06-16 |
| Pillar Bump With Noble Metal Seed Layer For Advanced Heterogeneous Integration App 20220139858 - Maniscalco; Joseph F. ; et al. | 2022-05-05 |
| Self-aligned top via Grant 11,315,872 - Park , et al. April 26, 2 | 2022-04-26 |
| Fully Aligned Top Vias App 20220108922 - Lanzillo; Nicholas Anthony ; et al. | 2022-04-07 |
| Fully aligned interconnects with selective area deposition Grant 11,289,375 - Park , et al. March 29, 2 | 2022-03-29 |
| Interconnect Structures Including Self Aligned Vias App 20220093453 - Yang; Chih-Chao ; et al. | 2022-03-24 |
| Fully-aligned top-via structures with top-via trim Grant 11,282,768 - Cheng , et al. March 22, 2 | 2022-03-22 |
| Adjustable via dimension and chamfer angle Grant 11,276,636 - Clevenger , et al. March 15, 2 | 2022-03-15 |
| BEOL metallization formation Grant 11,270,913 - Park , et al. March 8, 2 | 2022-03-08 |
| Encapsulated Top Via Interconnects App 20220044967 - van der Straten; Oscar ; et al. | 2022-02-10 |
| Back end of line metallization Grant 11,244,897 - Park , et al. February 8, 2 | 2022-02-08 |
| Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line Grant 11,244,859 - Motoyama , et al. February 8, 2 | 2022-02-08 |
| Dual damascene fully aligned via in interconnects Grant 11,244,854 - Cheng , et al. February 8, 2 | 2022-02-08 |
| Double patterning interconnect integration scheme with SAV Grant 11,244,860 - Chen , et al. February 8, 2 | 2022-02-08 |
| Fully aligned via interconnects with partially removed etch stop layer Grant 11,244,853 - Motoyama , et al. February 8, 2 | 2022-02-08 |
| Physical unclonable function for MRAM structures Grant 11,239,414 - Xie , et al. February 1, 2 | 2022-02-01 |
| Bottom conductive structure with a limited top contact area Grant 11,239,278 - Yang , et al. February 1, 2 | 2022-02-01 |
| Removal Of Barrier And Liner Layers From A Bottom Of A Via App 20220028738 - Park; Chanro ; et al. | 2022-01-27 |
| Bottom Barrier Free Interconnects Without Voids App 20220028797 - Cheng; Kenneth Chun Kuen ; et al. | 2022-01-27 |
| Interconnect structures including self aligned vias Grant 11,227,792 - Yang , et al. January 18, 2 | 2022-01-18 |
| Trapezoidal Interconnect at Tight BEOL Pitch App 20220013406 - Lanzillo; Nicholas Anthony ; et al. | 2022-01-13 |
| Fully aligned top vias Grant 11,217,481 - Lanzillo , et al. January 4, 2 | 2022-01-04 |
| Top via interconnect with self-aligned barrier layer Grant 11,205,591 - Cheng , et al. December 21, 2 | 2021-12-21 |
| Fully-aligned skip-vias Grant 11,201,112 - Cheng , et al. December 14, 2 | 2021-12-14 |
| Pitch multiplication with high pattern fidelity Grant 11,201,056 - Park , et al. December 14, 2 | 2021-12-14 |
| Dual Damascene Crossbar Array For Disabling A Defective Resistive Switching Device In The Array App 20210375389 - Maniscalco; Joseph F. ; et al. | 2021-12-02 |
| Interconnects with enlarged contact area Grant 11,183,455 - Motoyama , et al. November 23, 2 | 2021-11-23 |
| Interconnects with hybrid metal conductors Grant 11,177,214 - Cheng , et al. November 16, 2 | 2021-11-16 |
| Interconnects with gouged vias Grant 11,177,169 - Cheng , et al. November 16, 2 | 2021-11-16 |
| Encapsulated top via interconnects Grant 11,177,171 - van der Straten , et al. November 16, 2 | 2021-11-16 |
| Trapezoidal interconnect at tight BEOL pitch Grant 11,177,162 - Lanzillo , et al. November 16, 2 | 2021-11-16 |
| Removal of barrier and liner layers from a bottom of a via Grant 11,177,170 - Park , et al. November 16, 2 | 2021-11-16 |
| Top via structure with enlarged contact area with upper metallization level Grant 11,177,163 - Motoyama , et al. November 16, 2 | 2021-11-16 |
| Bottom barrier free interconnects without voids Grant 11,164,815 - Cheng , et al. November 2, 2 | 2021-11-02 |
| Interconnects with spacer structure for forming air-gaps Grant 11,164,774 - Cheng , et al. November 2, 2 | 2021-11-02 |
| Beol Metallization Formation App 20210335666 - Park; Chanro ; et al. | 2021-10-28 |
| Fully Aligned Via Interconnects With Partially Removed Etch Stop Layer App 20210335659 - Motoyama; Koichi ; et al. | 2021-10-28 |
| Interconnect structures with cobalt-infused ruthenium liner and a cobalt cap Grant 11,158,538 - Maniscalco , et al. October 26, 2 | 2021-10-26 |
| Interconnects With Enlarged Contact Area App 20210327803 - Motoyama; Koichi ; et al. | 2021-10-21 |
| Subtractive Back-end-of-line Vias App 20210313226 - Park; Chanro ; et al. | 2021-10-07 |
| Back End Of Line Metallization App 20210313264 - PARK; CHANRO ; et al. | 2021-10-07 |
| Fully aligned top vias with replacement metal lines Grant 11,139,202 - Park , et al. October 5, 2 | 2021-10-05 |
| Top via with hybrid metallization Grant 11,139,201 - Motoyama , et al. October 5, 2 | 2021-10-05 |
| Dual Damascene Fully Aligned Via Interconnects App 20210305090 - Cheng; Kenneth Chun Kuen ; et al. | 2021-09-30 |
| Physical Unclonable Function For Mram Structures App 20210305499 - Xie; Ruilong ; et al. | 2021-09-30 |
| Fully Aligned Interconnects With Selective Area Deposition App 20210296172 - Park; Chanro ; et al. | 2021-09-23 |
| Pitch Multiplication With High Pattern Fidelity App 20210296127 - PARK; CHANRO ; et al. | 2021-09-23 |
| Top Via Structure With Enlarged Contact Area With Upper Metallization Level App 20210296164 - Motoyama; Koichi ; et al. | 2021-09-23 |
| Removal or reduction of chamfer for fully-aligned via Grant 11,127,676 - Park , et al. September 21, 2 | 2021-09-21 |
| Dielectric damage-free dual damascene Cu interconnects without barrier at via bottom Grant 11,101,172 - Motoyama , et al. August 24, 2 | 2021-08-24 |
| Structure and method to fabricate fully aligned via with reduced contact resistance Grant 11,094,580 - Park , et al. August 17, 2 | 2021-08-17 |
| Planarization Stop Region For Use With Low Pattern Density Interconnects App 20210242077 - Peethala; Cornelius Brown ; et al. | 2021-08-05 |
| Bottom Conductive Structure With A Limited Top Contact Area App 20210242278 - Yang; Chih-Chao ; et al. | 2021-08-05 |
| Interconnect Structures With Cobalt-infused Ruthenium Liner And A Cobalt Cap App 20210242082 - Maniscalco; Joseph F. ; et al. | 2021-08-05 |
| Forming barrierless contact Grant 11,081,388 - Choi , et al. August 3, 2 | 2021-08-03 |
| Removal Of Barrier And Liner Layers From A Bottom Of A Via App 20210225702 - Park; Chanro ; et al. | 2021-07-22 |
| Removal Or Reduction Of Chamfer For Fully-aligned Via App 20210225759 - Park; Chanro ; et al. | 2021-07-22 |
| Fully-aligned Skip-vias App 20210225760 - Cheng; Kenneth Chun Kuen ; et al. | 2021-07-22 |
| Interconnects With Spacer Structure For Forming Air-gaps App 20210225691 - Cheng; Kenneth Chun Kuen ; et al. | 2021-07-22 |
| Hybrid sidewall barrier facilitating low resistance interconnection Grant 11,069,566 - van der Straten , et al. July 20, 2 | 2021-07-20 |
| Top Via Interconnect With Self-aligned Barrier Layer App 20210217662 - Cheng; Kenneth Chun Kuen ; et al. | 2021-07-15 |
| Interconnects With Hybrid Metal Conductors App 20210217698 - Cheng; Kenneth Chun Kuen ; et al. | 2021-07-15 |
| Top via interconnects with wrap around liner Grant 11,062,943 - Motoyama , et al. July 13, 2 | 2021-07-13 |
| Embedded anti-fuses for small scale applications Grant 11,024,577 - Park , et al. June 1, 2 | 2021-06-01 |
| Fully Aligned Top Vias App 20210143062 - Lanzillo; Nicholas Anthony ; et al. | 2021-05-13 |
| Fully-aligned Top-via Structures With Top-via Trim App 20210143085 - Cheng; Kenneth C. K. ; et al. | 2021-05-13 |
| Top Via With Hybrid Metallization App 20210134664 - Motoyama; Koichi ; et al. | 2021-05-06 |
| Double Patterning Interconnect Integration Scheme With Sav App 20210118732 - Chen; Shyng-Tsong ; et al. | 2021-04-22 |
| Interconnects Having Air Gap Spacers App 20210118722 - Cheng; Kenneth Chun Kuen ; et al. | 2021-04-22 |
| Interconnects Having A Via-to-line Spacer For Preventing Short Circuit Events Between A Conductive Via And An Adjacent Line App 20210111069 - Motoyama; Koichi ; et al. | 2021-04-15 |
| Fully Aligned Top Vias With Replacement Metal Lines App 20210098284 - Park; Chanro ; et al. | 2021-04-01 |
| Encapsulated Top Via Interconnects App 20210098293 - van der Straten; Oscar ; et al. | 2021-04-01 |
| Structure And Method To Fabricate Fully Aligned Via With Reduced Contact Resistance App 20210098287 - Park; Chanro ; et al. | 2021-04-01 |
| Bottom Barrier Free Interconnects Without Voids App 20210098388 - Cheng; Kenneth Chun Kuen ; et al. | 2021-04-01 |
| Interconnect Structures Including Self Aligned Vias App 20210090942 - Yang; Chih-Chao ; et al. | 2021-03-25 |
| Interconnects Having Air Gap Spacers App 20210090938 - Cheng; Kenneth Chun Kuen ; et al. | 2021-03-25 |
| Hybrid BEOL metallization utilizing selective reflection mask Grant 10,957,646 - Briggs , et al. March 23, 2 | 2021-03-23 |
| Trapezoidal Interconnect at Tight BEOL Pitch App 20210082744 - Lanzillo; Nicholas Anthony ; et al. | 2021-03-18 |
| Interconnects having air gap spacers Grant 10,950,493 - Cheng , et al. March 16, 2 | 2021-03-16 |
| Top Via Interconnects With Wrap Around Liner App 20210043507 - Motoyama; Koichi ; et al. | 2021-02-11 |
| Adjustable Via Dimension and Chamfer Angle App 20210035904 - Clevenger; Lawrence A. ; et al. | 2021-02-04 |
| Void-free metallic interconnect structures with self-formed diffusion barrier layers Grant 10,903,116 - Maniscalco , et al. January 26, 2 | 2021-01-26 |
| Surface modified dielectric refill structure Grant 10,886,168 - Yang , et al. January 5, 2 | 2021-01-05 |
| Interconnects With Gouged Vias App 20200402844 - Cheng; Kenneth Chun Kuen ; et al. | 2020-12-24 |
| Surface Modified Dielectric Refill Structure App 20200388524 - Yang; Chih-Chao ; et al. | 2020-12-10 |
| Low resistance metal-insulator-metal capacitor electrode Grant 10,840,325 - Maniscalco , et al. November 17, 2 | 2020-11-17 |
| Copper Metallization Fill App 20200350201 - Motoyama; Koichi ; et al. | 2020-11-05 |
| Air-Gap Containing Metal Interconnects App 20200273743 - Cheng; Kenneth C. K. ; et al. | 2020-08-27 |
| Air-gap containing metal interconnects Grant 10,748,812 - Cheng , et al. A | 2020-08-18 |
| Dielectric Damage-Free Dual Damascene Cu Interconnects Without Barrier at Via Bottom App 20200243379 - Motoyama; Koichi ; et al. | 2020-07-30 |
| Forming Barrierless Contact App 20200227313 - Choi; Kisik ; et al. | 2020-07-16 |
| Hybrid Beol Metallization Utilizing Selective Reflection Mask App 20200176388 - BRIGGS; Benjamin D. ; et al. | 2020-06-04 |
| Dielectric damage-free dual damascene Cu interconnects without barrier at via bottom Grant 10,658,233 - Motoyama , et al. | 2020-05-19 |
| Dielectric Damage-Free Dual Damascene Cu Interconnects Without Barrier at Via Bottom App 20200126854 - Motoyama; Koichi ; et al. | 2020-04-23 |
| Hybrid Sidewall Barrier Facilitating Low Resistance Interconnection App 20200118870 - van der Straten; Oscar ; et al. | 2020-04-16 |
| Hybrid BEOL metallization utilizing selective reflection mask Grant 10,586,767 - Briggs , et al. | 2020-03-10 |
| Low resistance interconnect structure with partial seed enhancement liner Grant 10,546,815 - van der Straten , et al. Ja | 2020-01-28 |
| Hybrid Beol Metallization Utilizing Selective Reflection Mask App 20200027840 - BRIGGS; Benjamin D. ; et al. | 2020-01-23 |
| Void-free Metallic Interconnect Structures With Self-formed Diffusion Barrier Layers App 20200020581 - Maniscalco; Joseph F. ; et al. | 2020-01-16 |
| Void-free Metallic Interconnect Structures With Self-formed Diffusion Barrier Layers App 20200020577 - Maniscalco; Joseph F. ; et al. | 2020-01-16 |
| Void-free metallic interconnect structures with self-formed diffusion barrier layers Grant 10,529,622 - Maniscalco , et al. J | 2020-01-07 |
| Low Resistance Interconnect Structure With Partial Seed Enhancement Liner App 20190371735 - van der Straten; Oscar ; et al. | 2019-12-05 |
| Low Resistance Metal-insulator-metal Capacitor Electrode App 20190319088 - Maniscalco; Joseph F. ; et al. | 2019-10-17 |
| Binary metallization structure for nanoscale dual damascene interconnects Grant 10,388,600 - Reznicek , et al. A | 2019-08-20 |
| Enlarged contact area structure using noble metal cap and noble metal liner Grant 10,361,119 - Motoyama , et al. | 2019-07-23 |
| Method of forming a dual metal interconnect structure Grant 10,340,355 - Adusumilli , et al. | 2019-07-02 |
| Binary Metallization Structure For Nanoscale Dual Damascene Interconnects App 20190189555 - Reznicek; Alexander ; et al. | 2019-06-20 |
| Binary metallization structure for nanoscale dual damascene interconnects Grant 10,269,698 - Reznicek , et al. | 2019-04-23 |
| Reflow interconnect using Ru Grant 10,217,664 - Clevenger , et al. Feb | 2019-02-26 |
| Reflow interconnect using Ru Grant 10,211,101 - Clevenger , et al. Feb | 2019-02-19 |
| Enabling low resistance gates and contacts integrated with bilayer dielectrics Grant 10,204,828 - Bao , et al. Feb | 2019-02-12 |
| Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects Grant 10,134,674 - Briggs , et al. November 20, 2 | 2018-11-20 |
| REFLOW INTERCONNECT USING Ru App 20180277433 - Clevenger; Lawrence A. ; et al. | 2018-09-27 |
| REFLOW INTERCONNECT USING Ru App 20180277432 - Clevenger; Lawrence A. ; et al. | 2018-09-27 |
| Ion flow barrier structure for interconnect metallization Grant 9,966,305 - Demarest , et al. May 8, 2 | 2018-05-08 |
| Reflow interconnect using Ru Grant 9,960,078 - Clevenger , et al. May 1, 2 | 2018-05-01 |
| Structure And Method For Improved Stabilization Of Cobalt Cap And/or Cobalt Liner In Interconnects App 20180005953 - Briggs; Benjamin D. ; et al. | 2018-01-04 |
| Ion flow barrier structure for interconnect metallization Grant 9,793,213 - Demarest , et al. October 17, 2 | 2017-10-17 |
| Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects Grant 9,780,035 - Briggs , et al. October 3, 2 | 2017-10-03 |
| Dual Metal Interconnect Structure App 20170278939 - Adusumilli; Praneet ; et al. | 2017-09-28 |
| Dual Metal Interconnect Structure App 20170243947 - Adusumilli; Praneet ; et al. | 2017-08-24 |
| Dual metal interconnect structure Grant 9,741,812 - Adusumilli , et al. August 22, 2 | 2017-08-22 |
| Ion Flow Barrier Structure For Interconnect Metallization App 20170236748 - Demarest; James J. ; et al. | 2017-08-17 |
| Ion Flow Barrier Structure For Interconnect Metallization App 20170236784 - Demarest; James J. ; et al. | 2017-08-17 |
| Structure and fabrication method for electromigration immortal nanoscale interconnects Grant 9,418,934 - Briggs , et al. August 16, 2 | 2016-08-16 |
| Copper interconnect with CVD liner and metallic cap Grant 9,111,938 - Baumann , et al. August 18, 2 | 2015-08-18 |
| Copper interconnect with CVD liner and metallic cap Grant 9,059,176 - Baumann , et al. June 16, 2 | 2015-06-16 |
| Copper Interconnect With Cvd Liner And Metallic Cap App 20150061135 - Baumann; Frieder H. ; et al. | 2015-03-05 |
| Semiconductor Device Including An Insulating Layer, And Method Of Forming The Semiconductor Device App 20140117550 - Motoyama; Koichi ; et al. | 2014-05-01 |
| Copper Interconnect With Cvd Liner And Metallic Cap App 20130277842 - Baumann; Frieder Hainrich ; et al. | 2013-10-24 |
| Method for manufacturing a semiconductor device Grant 8,216,940 - Motoyama July 10, 2 | 2012-07-10 |
| Method For Manufacturing A Semiconductor Device App 20110124190 - MOTOYAMA; Koichi | 2011-05-26 |
| Semiconductor device and method for manufacturing the same Grant 7,892,976 - Motoyama February 22, 2 | 2011-02-22 |
| Semiconductor Device And Method Of Manufacturing Semiconductor Device App 20100123249 - MOTOYAMA; Koichi | 2010-05-20 |
| Semiconductor Device And Method For Manufacturing The Same App 20090239377 - Motoyama; Koichi | 2009-09-24 |
| Semiconductor device and method for manufacturing the same Grant 7,566,975 - Motoyama July 28, 2 | 2009-07-28 |
| Semiconductor device and method for manufacturing the same App 20050245065 - Motoyama, Koichi | 2005-11-03 |
| Semiconductor device and method for manufacturing the same Grant 6,900,539 - Motoyama May 31, 2 | 2005-05-31 |
| Semiconductor device and method for manufacturing the same App 20030075752 - Motoyama, Koichi | 2003-04-24 |
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