loadpatents
name:-0.008310079574585
name:-0.057812929153442
name:-0.0019090175628662
Mostafazadeh; Shahram Patent Filings

Mostafazadeh; Shahram

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mostafazadeh; Shahram.The latest application filed is for "integration of structurally-stable isolated capacitive micromachined ultrasonic transducer (cmut) array cells and array elements".

Company Profile
0.45.5
  • Mostafazadeh; Shahram - San Jose CA
  • Mostafazadeh; Shahram - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integration of structurally-stable isolated capacitive micromachined ultrasonic transducer (CMUT) array cells and array elements
Grant 8,563,345 - Adler , et al. October 22, 2
2013-10-22
Integration Of Structurally-stable Isolated Capacitive Micromachined Ultrasonic Transducer (cmut) Array Cells And Array Elements
App 20120187508 - Adler; Steven J. ;   et al.
2012-07-26
Metallurgy For Copper Plated Wafers
App 20110024910 - MOSTAFAZADEH; Shahram ;   et al.
2011-02-03
Metallurgy for copper plated wafers
Grant 7,838,991 - Mostafazadeh , et al. November 23, 2
2010-11-23
Micro surface mount die package and method
Grant 7,514,769 - Mostafazadeh April 7, 2
2009-04-07
Die-level opto-electronic device and method of making same
Grant 7,468,288 - Mostafazadeh , et al. December 23, 2
2008-12-23
Integrated circuit device package having a support coating for improved reliability during temperature cycling
Grant 7,423,337 - Patwardhan , et al. September 9, 2
2008-09-09
Packaging of a semiconductor device with a non-opaque cover
Grant 7,405,100 - Mostafazadeh , et al. July 29, 2
2008-07-29
Leadless microelectronic package and a method to maximize the die size in the package
Grant 7,288,439 - Mostafazadeh , et al. October 30, 2
2007-10-30
Lead frame chip scale package
Grant RE39,854 - Mostafazadeh , et al. September 25, 2
2007-09-25
Method and apparatus for forming an underfill adhesive layer
Grant 7,253,078 - Nguyen , et al. August 7, 2
2007-08-07
Multichip packages with exposed dice
App 20070037320 - Mostafazadeh; Shahram ;   et al.
2007-02-15
Apparatus and method for force mounting semiconductor packages to printed circuit boards
Grant 7,171,745 - Mostafazadeh , et al. February 6, 2
2007-02-06
Multichip packages with exposed dice
Grant 7,144,800 - Mostafazadeh , et al. December 5, 2
2006-12-05
Die-level opto-electronic device and method of making same
Grant 7,098,518 - Mostafazadeh , et al. August 29, 2
2006-08-29
Microarray lead frame
Grant 7,095,096 - Mostafazadeh August 22, 2
2006-08-22
Die with integral pedestal having insulated walls
Grant 7,067,927 - Mostafazadeh June 27, 2
2006-06-27
Bumped integrated circuits for optical applications
Grant 7,012,282 - Mostafazadeh , et al. March 14, 2
2006-03-14
Packaging of semiconductor device with a non-opaque cover
Grant 7,002,241 - Mostafazadeh , et al. February 21, 2
2006-02-21
Flip chip optical semiconductor on a PCB
Grant 6,984,866 - Mostafazadeh , et al. January 10, 2
2006-01-10
Chip scale pin array
Grant 6,975,038 - Mostafazadeh December 13, 2
2005-12-13
Multichip packages with exposed dice
Grant 6,936,929 - Mostafazadeh , et al. August 30, 2
2005-08-30
Leadless microelectronic package and a method to maximize the die size in the package
Grant 6,894,376 - Mostafazadeh , et al. May 17, 2
2005-05-17
Lead frame chip scale package
Grant 6,888,228 - Mostafazadeh , et al. May 3, 2
2005-05-03
Apparatus and method for force mounting semiconductor packages to printed circuit boards
App 20050039330 - Mostafazadeh, Shahram ;   et al.
2005-02-24
Multichip packages with exposed dice
App 20040259288 - Mostafazadeh, Shahram ;   et al.
2004-12-23
Apparatus and method for force mounting semiconductor packages to printed circuit boards
Grant 6,823,582 - Mostafazadeh , et al. November 30, 2
2004-11-30
Substrate for semiconductor packaging
Grant 6,812,125 - Mostafazadeh November 2, 2
2004-11-02
Lead frame design for chip scale package
Grant 6,740,961 - Mostafazadeh May 25, 2
2004-05-25
Apparatus and method of manufacturing a stackable package for a semiconductor device
Grant 6,710,246 - Mostafazadeh , et al. March 23, 2
2004-03-23
Chip scale pin array
Grant 6,689,640 - Mostafazadeh February 10, 2
2004-02-10
Lead frame design for chip scale package
Grant 6,683,368 - Mostafazadeh January 27, 2
2004-01-27
Method for molding a bumped wafer
Grant 6,352,878 - Mostafazadeh , et al. March 5, 2
2002-03-05
Techniques for wafer level molding of underfill encapsulant
Grant 6,245,595 - Nguyen , et al. June 12, 2
2001-06-12
Lead frame chip scale package
Grant 6,130,473 - Mostafazadeh , et al. October 10, 2
2000-10-10
Chip sized package
Grant 6,054,772 - Mostafazadeh , et al. April 25, 2
2000-04-25
Lead frame design for increased chip pinout
Grant 6,034,423 - Mostafazadeh , et al. March 7, 2
2000-03-07
Ball grid array package with enhanced thermal and electrical characteristics and electronic device incorporating same
Grant 5,986,340 - Mostafazadeh , et al. November 16, 1
1999-11-16
Plastic package with exposed die
Grant 5,894,108 - Mostafazadeh , et al. April 13, 1
1999-04-13
Method for connecting packages of a stacked ball grid array structure
Grant 5,783,870 - Mostafazadeh , et al. July 21, 1
1998-07-21
High density integrated circuit package assembly with a heatsink between stacked dies
Grant 5,739,581 - Chillara , et al. April 14, 1
1998-04-14
Thermal ball lead integrated package
Grant 5,705,851 - Mostafazadeh , et al. January 6, 1
1998-01-06
Ball grid array package with lead frame
Grant 5,663,593 - Mostafazadeh , et al. September 2, 1
1997-09-02
Semiconductor component package assembly including an integral RF/EMI shield
Grant 5,650,659 - Mostafazadeh , et al. July 22, 1
1997-07-22
Tape ball lead integrated circuit package
Grant 5,648,679 - Chillara , et al. July 15, 1
1997-07-15
Ball grid array with heat sink
Grant 5,598,321 - Mostafazadeh , et al. January 28, 1
1997-01-28
Lead frame having layered conductive planes
Grant 5,498,901 - Chillara , et al. March 12, 1
1996-03-12
High density integrated circuit assembly combining leadframe leads with conductive traces
Grant 5,442,230 - Chillara , et al. August 15, 1
1995-08-15
Method of and arrangement for preventing bonding wire shorts with certain integrated circuit components
Grant 5,408,127 - Mostafazadeh April 18, 1
1995-04-18

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