loadpatents
name:-0.040606021881104
name:-0.019053936004639
name:-0.00041604042053223
MORROW; Michael William Patent Filings

MORROW; Michael William

Patent Applications and Registrations

Patent applications and USPTO patent grants for MORROW; Michael William.The latest application filed is for "prefetch mechanisms with non-equal magnitude stride".

Company Profile
0.19.35
  • MORROW; Michael William - Wilkes Barre PA
  • Morrow; Michael William - Cary NC US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Prefetch Mechanisms With Non-equal Magnitude Stride
App 20180173631 - SARTORIUS; Thomas Andrew ;   et al.
2018-06-21
Write-allocation For A Cache Based On Execute Permissions
App 20170255569 - SARTORIUS; Thomas Andrew ;   et al.
2017-09-07
Combining Loads Or Stores In Computer Processing
App 20170249144 - JAGET; Kevin ;   et al.
2017-08-31
Determining Prefetch Instructions Based On Instruction Encoding
App 20170046158 - YEN; Luke ;   et al.
2017-02-16
Predicting Memory Instruction Punts In A Computer Processor Using A Punt Avoidance Table (pat)
App 20170046167 - Yen; Luke ;   et al.
2017-02-16
Method and apparatus for cache tag compression
Grant 9,514,061 - Pellerin, III , et al. December 6, 2
2016-12-06
Mitigating Wrong-path Effects In Branch Prediction
App 20160350116 - REDDY; Vimal Kodandarama ;   et al.
2016-12-01
Method And Apparatus For Cache Tag Compression
App 20160342530 - PELLERIN, III; Henry Arthur ;   et al.
2016-11-24
Eliminating Redundancy In A Branch Target Instruction Cache By Establishing Entries Using The Target Address Of A Subroutine
App 20160335089 - REDDY; Vimal Kodandarama ;   et al.
2016-11-17
Fusing immediate value, write-based instructions in instruction processing circuits, and related processor systems, methods, and computer-readable media
Grant 9,477,476 - Brown , et al. October 25, 2
2016-10-25
Multi level indirect predictor using confidence counter and program counter address filter scheme
Grant 9,477,478 - Kothari , et al. October 25, 2
2016-10-25
Removing Invalid Literal Load Values, And Related Circuits, Methods, And Computer-readable Media
App 20160291981 - Robatmili; Behnam ;   et al.
2016-10-06
Establishing a branch target instruction cache (BTIC) entry for subroutine returns to reduce execution pipeline bubbles, and related systems, methods, and computer-readable media
Grant 9,317,293 - Dieffenderfer , et al. April 19, 2
2016-04-19
Propagating Constant Values Using A Computed Constants Table, And Related Apparatuses And Methods
App 20160092232 - Morrow; Michael William
2016-03-31
Accelerating Constant Value Generation Using A Computed Constants Table, And Related Circuits, Methods, And Computer-readable Media
App 20160092219 - Morrow; Michael William
2016-03-31
Predicting Literal Load Values Using A Literal Load Prediction Table, And Related Circuits, Methods, And Computer-readable Media
App 20160077836 - Morrow; Michael William
2016-03-17
Fusing conditional write instructions having opposite conditions in instruction processing circuits, and related processor systems, methods, and computer-readable media
Grant 9,195,466 - Brown , et al. November 24, 2
2015-11-24
Eliminating redundant masking operations instruction processing circuits, and related processor systems, methods, and computer-readable media
Grant 9,146,741 - Brown , et al. September 29, 2
2015-09-29
Memory management unit with pre-filling capability
Grant 9,092,358 - Rychlik , et al. July 28, 2
2015-07-28
Apparatus and methods for adaptive thread scheduling on asymmetric multiprocessor
Grant 9,043,795 - Morrow , et al. May 26, 2
2015-05-26
Method And Apparatus For Forwarding Literal Generated Data To Dependent Instructions More Efficiently Using A Constant Cache
App 20140281391 - Dieffenderfer; James Norris ;   et al.
2014-09-18
Hardware Optimization Of Hard-to-predict Short Forward Branches
App 20140281439 - Reddy; Vimal K. ;   et al.
2014-09-18
Fusing Immediate Value, Write-Based Instructions in Instruction Processing Circuits, and Related Processor Systems, Methods, and Computer-Readable Media
App 20140149722 - Brown; Melinda J. ;   et al.
2014-05-29
Establishing A Branch Target Instruction Cache (btic) Entry For Subroutine Returns To Reduce Execution Pipeline Bubbles, And Related Systems, Methods, And Computer-readable Media
App 20140149726 - Dieffenderfer; James Norris ;   et al.
2014-05-29
Fusing Flag-producing And Flag-consuming Instructions In Instruction Processing Circuits, And Related Processor Systems, Methods, And Computer-readable Media
App 20140047221 - Irwin; Andrew S. ;   et al.
2014-02-13
Qualifying Software Branch-Target Hints with Hardware-Based Predictions
App 20140006752 - Morrow; Michael William ;   et al.
2014-01-02
Multi Level Indirect Predictor using Confidence Counter and Program Counter Address Filter Scheme
App 20130311760 - Kothari; Kulin N. ;   et al.
2013-11-21
Fusing Conditional Write Instructions Having Opposite Conditions In Instruction Processing Circuits, And Related Processor Systems, Methods, And Computer-readable Media
App 20130311754 - Brown; Melinda J. ;   et al.
2013-11-21
Eliminating Redundant Masking Operations Instruction Processing Circuits, And Related Processor Systems, Methods, And Computer-Readable Media
App 20130290683 - Brown; Melinda J. ;   et al.
2013-10-31
Method and a system for accelerating procedure return sequences
Grant 8,341,383 - Dieffenderfer , et al. December 25, 2
2012-12-25
Memory Management Unit With Pre-Filling Capability
App 20120226888 - Rychlik; Bohuslav ;   et al.
2012-09-06
Indirect Branch Hint
App 20110320787 - Dieffenderfer; James Norris ;   et al.
2011-12-29
Apparatus and methods for low-complexity instruction prefetch system
Grant 8,060,701 - Morrow , et al. November 15, 2
2011-11-15
Apparatuses, Systems, and Methods for Reducing Translation Lookaside Buffer (TLB) Lookups
App 20110145542 - Morrow; Michael William
2011-06-16
Method and apparatus for setting cache policies in a processor
Grant 7,949,834 - Morrow May 24, 2
2011-05-24
Data prefetch throttle
Grant 7,917,702 - Morrow , et al. March 29, 2
2011-03-29
Apparatus and Methods for Adaptive Thread Scheduling on Asymmetric Multiprocessor
App 20100153954 - Morrow; Michael William ;   et al.
2010-06-17
System for reducing number of lookups in a branch target address cache by storing retrieved BTAC addresses into instruction cache
Grant 7,640,422 - Morrow December 29, 2
2009-12-29
Efficient memory hierarchy management
Grant 7,552,283 - Morrow , et al. June 23, 2
2009-06-23
Method and a System for Accelerating Procedure Return Sequences
App 20090119486 - Dieffenderfer; James Norris ;   et al.
2009-05-07
Data Prefetch Throttle
App 20090019229 - Morrow; Michael William ;   et al.
2009-01-15
Methods and apparatus for recognizing a subroutine call
Grant 7,444,501 - Morrow October 28, 2
2008-10-28
Method and Apparatus for Setting Cache Policies in a Processor
App 20080177952 - Morrow; Michael William
2008-07-24
Apparatus and methods for low-complexity instruction prefetch system
App 20080140996 - Morrow; Michael William ;   et al.
2008-06-12
Methods And Apparatus For Recognizing A Subroutine Call
App 20080126770 - Morrow; Michael William
2008-05-29
Method and apparatus for caching variable length instructions
Grant 7,337,272 - Morrow February 26, 2
2008-02-26
Methods and Apparatus for Reducing Lookups in a Branch Target Address Cache
App 20080046702 - Morrow; Michael William
2008-02-21
Method and Apparatus for Caching Variable Length Instructions
App 20070255905 - Morrow; Michael William
2007-11-01
Efficient memory hierarchy management
App 20070174553 - Morrow; Michael William ;   et al.
2007-07-26

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