loadpatents
name:-0.0015730857849121
name:-0.009152889251709
name:-0.00056099891662598
Moriuchi; Noboru Patent Filings

Moriuchi; Noboru

Patent Applications and Registrations

Patent applications and USPTO patent grants for Moriuchi; Noboru.The latest application filed is for "process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process".

Company Profile
0.9.1
  • Moriuchi; Noboru - Tokyo JP
  • Moriuchi; Noboru - Chofu JP
  • Moriuchi; Noboru - Oume JP
  • Moriuchi; Noboru - Ohme JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process
Grant 6,794,118 - Okamoto , et al. September 21, 2
2004-09-21
Semiconductor memory device with recessed array region
Grant RE38,296 - Moriuchi , et al. November 4, 2
2003-11-04
Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process
App 20020025479 - Okamoto, Yoshihiko ;   et al.
2002-02-28
Method of manufacturing phase shift masks and a method of manufacturing semiconductor integrated circuit devices
Grant 5,725,971 - Moriuchi , et al. March 10, 1
1998-03-10
Manufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used therefor
Grant 5,578,422 - Mizuno , et al. November 26, 1
1996-11-26
Resist removing method, and curable pressure-sensitive adhesive, adhesive sheets and apparatus used for the method
Grant 5,466,325 - Mizuno , et al. November 14, 1
1995-11-14
Manufacturing method or an exposing method for a semiconductor device for a semiconductor integrated circuit device and a mask used therefor
Grant 5,436,095 - Mizuno , et al. July 25, 1
1995-07-25
Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process
Grant 5,298,365 - Okamoto , et al. March 29, 1
1994-03-29
Semiconductor memory device with recessed array region
Grant 5,196,910 - Moriuchi , et al. March 23, 1
1993-03-23
Method of making a semiconductor memory device with recessed array region
Grant 4,882,289 - Moriuchi , et al. November 21, 1
1989-11-21

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