loadpatents
name:-0.010061979293823
name:-0.010051012039185
name:-0.00055098533630371
Morhard; Klaus-Dieter Patent Filings

Morhard; Klaus-Dieter

Patent Applications and Registrations

Patent applications and USPTO patent grants for Morhard; Klaus-Dieter.The latest application filed is for "method of forming a doped portion of a semiconductor and method of forming a transistor".

Company Profile
0.7.6
  • Morhard; Klaus-Dieter - Dresden DE
  • Morhard, Klaus-Dieter - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of forming a doped portion of a semiconductor and method of forming a transistor
Grant 7,618,867 - Mono , et al. November 17, 2
2009-11-17
Method for the formation of contact holes for a number of contact regions for components integrated in a substrate
Grant 7,452,821 - Gruening-Von Schwerin , et al. November 18, 2
2008-11-18
Method of forming a doped portion of a semiconductor and method of forming a transistor
App 20080026530 - Mono; Tobias ;   et al.
2008-01-31
Method for generating an electrical contact with buried track conductors
Grant 7,122,434 - Ludwig , et al. October 17, 2
2006-10-17
Method for the planarization of a semiconductor structure
Grant 7,030,017 - Hollatz , et al. April 18, 2
2006-04-18
Method for generating an electrical contact with buried track conductors
App 20050201131 - Ludwig, Christoph ;   et al.
2005-09-15
Semiconductor structure having buried track conductors, and method for generating an electrical contact with buried track conductors
Grant 6,909,153 - Ludwig , et al. June 21, 2
2005-06-21
Trench capacitor with an insulation collar and method for producing a trench capacitor
Grant 6,828,191 - Wurster , et al. December 7, 2
2004-12-07
Method for the formation of contact holes for a number of contact regions for components integrated in a substrate
App 20040206722 - Gruening-Von Schwerin, Ulrike ;   et al.
2004-10-21
Method for the planarization of a semiconductor structure
App 20040127040 - Hollatz, Mark ;   et al.
2004-07-01
Semiconductor structure having buried track conductors, and method for generating an electrical contact with buried track conductors
App 20030006506 - Ludwig, Christoph ;   et al.
2003-01-09
Method for increasing the trench capacitance
App 20020018377 - Morhard, Klaus-Dieter ;   et al.
2002-02-14
Method for producing a polycrystalline silicon structure and polycrystalline silicon layer to be produced by the method
Grant 6,068,928 - Schrems , et al. May 30, 2
2000-05-30

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed