Patent | Date |
---|
Active memory device gather, scatter, and filter Grant 10,049,061 - Fleischer , et al. August 14, 2 | 2018-08-14 |
Gather/scatter of multiple data elements with packed loading/storing into/from a register file entry Grant 9,632,777 - Fleischer , et al. April 25, 2 | 2017-04-25 |
Gather/scatter of multiple data elements with packed loading/storing into /from a register file entry Grant 9,632,778 - Fleischer , et al. April 25, 2 | 2017-04-25 |
Tree traversal in a memory device Grant 9,064,030 - Kahle , et al. June 23, 2 | 2015-06-23 |
Active buffered memory Grant 9,003,160 - Fleischer , et al. April 7, 2 | 2015-04-07 |
Tree Traversal In A Memory Device App 20140149464 - Kahle; James A. ;   et al. | 2014-05-29 |
Active Memory Device Gather, Scatter, And Filter App 20140136811 - Fleischer; Bruce M. ;   et al. | 2014-05-15 |
Packed Load/store With Gather/scatter App 20140040599 - Fleischer; Bruce M. ;   et al. | 2014-02-06 |
Packed Load/store With Gather/scatter App 20140040596 - Fleischer; Bruce M. ;   et al. | 2014-02-06 |
Active Buffered Memory App 20140040592 - Fleischer; Bruce M. ;   et al. | 2014-02-06 |
Cache line replacement techniques allowing choice of LFU or MFU cache line replacement Grant 7,958,311 - Matick , et al. June 7, 2 | 2011-06-07 |
Cache line replacement techniques allowing choice of LFU or MFU cache line replacement Grant 7,870,341 - Matick , et al. January 11, 2 | 2011-01-11 |
Cache Line Replacement Techniques Allowing Choice Of Lfu Or Mfu Cache Line Replacement App 20090182951 - Matick; Richard Edward ;   et al. | 2009-07-16 |
Cache Line Replacement Techniques Allowing Choice Of Lfu Or Mfu Cache Line Replacement App 20090031084 - Matick; Richard Edward ;   et al. | 2009-01-29 |
Cache line replacement techniques allowing choice of LFU or MFU cache line replacement Grant 7,398,357 - Matick , et al. July 8, 2 | 2008-07-08 |
Cache Line Replacement Techniques Allowing Choice Of Lfu Or Mfu Cache Line Replacement App 20080147982 - Matick; Richard Edward ;   et al. | 2008-06-19 |
Cache with selective least frequently used or most frequently used cache line replacement Grant 7,133,971 - Matick , et al. November 7, 2 | 2006-11-07 |
System and method for instruction memory storage and processing based on backwards branch control information Grant 7,130,963 - Asaad , et al. October 31, 2 | 2006-10-31 |
Selective bypassing of a multi-port register file Grant 7,051,186 - Asaad , et al. May 23, 2 | 2006-05-23 |
Method and apparatus for reducing logic activity in a microprocessor using reduced bit width slices that are enabled or disabled depending on operation width Grant 6,948,051 - Rivers , et al. September 20, 2 | 2005-09-20 |
Cache with selective least frequently used or most frequently used cache line replacement App 20050114606 - Matick, Richard Edward ;   et al. | 2005-05-26 |
System and method for instruction memory storage and processing based on backwards branch control information App 20050015537 - Asaad, Sameh W. ;   et al. | 2005-01-20 |
Apparatus and method for updating pointers for indirect and parallel register access App 20040181646 - Ben-David, Shay ;   et al. | 2004-09-16 |
Method and apparatus for history-based movement of shared-data in coherent cache memories of a multiprocessor system using push prefetching Grant 6,711,651 - Moreno , et al. March 23, 2 | 2004-03-23 |
Method and apparatus for reducing encoding needs and ports to shared resources in a processor Grant 6,704,855 - Altman , et al. March 9, 2 | 2004-03-09 |
selective bypassing of a multi-port register file App 20040044882 - Asaad, Sameh ;   et al. | 2004-03-04 |
Digital signal processor with SIMD organization and flexible data manipulation App 20040015677 - Moreno, Jaime H. ;   et al. | 2004-01-22 |
Apparatus for multiplication of data in two's complement and unsigned magnitude formats App 20040010536 - Moreno, Jaime H. ;   et al. | 2004-01-15 |
Method and apparatus for memory prefetching based on intra-page usage history Grant 6,678,795 - Moreno , et al. January 13, 2 | 2004-01-13 |
Method and apparatus for reducing logic activity in a microprocessor App 20020174319 - Rivers, Jude A. ;   et al. | 2002-11-21 |
Method and apparatus for reordering memory operations in a superscalar or very long instruction word processor Grant 5,625,835 - Ebcioglu , et al. April 29, 1 | 1997-04-29 |