Moreira; Jose Eduardo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Moreira; Jose Eduardo.The latest application filed is for "reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices".

Company Profile

3.18.16

Moreira; Jose Eduardo - Irvington NY
Moreira; Jose Eduardo - Yorktown Heights NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices Grant 10,983,800 - Eisen , et al. April 20, 2	2021-04-20
Reducing memory access latency in scatter/gather operations Grant 10,884,942 - Horn , et al. January 5, 2	2021-01-05
Actively controlled performance clothing Grant 10,219,556 - Daly , et al.	2019-03-05
Processing of multiple instruction streams in a parallel slice processor Grant 10,157,064 - Eisen , et al. Dec	2018-12-18
Reconfigurable Processor With Load-store Slices Supporting Reorder And Controlling Access To Cache Slices App 20180285118 - Eisen; Lee Evan ; et al.	2018-10-04
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices Grant 10,083,039 - Eisen , et al. September 25, 2	2018-09-25
Reconfigurable Processor With Load-store Slices Supporting Reorder And Controlling Access To Cache Slices App 20180150300 - Eisen; Lee Evan ; et al.	2018-05-31
Reconfigurable parallel execution and load-store slice processor Grant 9,977,678 - Eisen , et al. May 22, 2	2018-05-22
Reconfigurable processing method with modes controlling the partitioning of clusters and cache slices Grant 9,971,602 - Eisen , et al. May 15, 2	2018-05-15
Reducing Memory Access Latency In Scatter/gather Operations App 20170336971 - HORN; William Pettit ; et al.	2017-11-23
Sophisticated run-time system for graph processing Grant 9,778,967 - Ekanadham , et al. October 3, 2	2017-10-03
Sophisticated run-time system for graph processing Grant 9,772,890 - Ekanadham , et al. September 26, 2	2017-09-26
Processing of multiple instruction streams in a parallel slice processor Grant 9,690,586 - Eisen , et al. June 27, 2	2017-06-27
Parallel slice processor with dynamic instruction stream mapping Grant 9,690,585 - Eisen , et al. June 27, 2	2017-06-27
Processing Of Multiple Instruction Streams In A Parallel Slice Processor App 20170168837 - Eisen; Lee Evan ; et al.	2017-06-15
Actively Controlled Performance Clothing App 20170164664 - Daly; David M. ; et al.	2017-06-15
Processing of multiple instruction streams in a parallel slice processor Grant 9,672,043 - Eisen , et al. June 6, 2	2017-06-06
Parallel slice processor with dynamic instruction stream mapping Grant 9,665,372 - Eisen , et al. May 30, 2	2017-05-30
Optimized system for analytics (graphs and sparse matrices) operations Grant 9,400,700 - Ekanadham , et al. July 26, 2	2016-07-26
Reconfigurable Parallel Execution And Load-store Slice Processor App 20160202989 - Eisen; Lee Evan ; et al.	2016-07-14
Reconfigurable Parallel Execution And Load-store Slice Processing Methods App 20160202991 - Eisen; Lee Evan ; et al.	2016-07-14
Sophisticated Run-time System For Graph Processing App 20160188656 - EKANADHAM; Kattamuri ; et al.	2016-06-30
Sophisticated Run-time System For Graph Processing App 20160188391 - EKANADHAM; Kattamuri ; et al.	2016-06-30
Optimized system for analytics (graphs and sparse matrices) operations Grant 9,304,835 - Ekanadham , et al. April 5, 2	2016-04-05
Processing Of Multiple Instruction Streams In A Parallel Slice Processor App 20150324207 - Eisen; Lee Evan ; et al.	2015-11-12
Parallel Slice Processor With Dynamic Instruction Stream Mapping App 20150324204 - Eisen; Lee Evan ; et al.	2015-11-12
Processing Of Multiple Instruction Streams In A Parallel Slice Processor App 20150324205 - Eisen; Lee Evan ; et al.	2015-11-12
Parallel Slice Processor With Dynamic Instruction Stream Mapping App 20150324206 - Eisen; Lee Evan ; et al.	2015-11-12
Selective Delaying of Write Requests in Hardware Transactional Memory Systems App 20140075124 - Blundell; Colin B. ; et al.	2014-03-13
Executing An Allgather Operation With An Alltoallv Operation In A Parallel Computer App 20080022079 - Archer; Charles J. ; et al.	2008-01-24
Method for optimizing array bounds checks in programs Grant 6,343,375 - Gupta , et al. January 29, 2	2002-01-29
Method for resource control in parallel environments using program organization and run-time support Grant 6,321,373 - Ekanadham , et al. November 20, 2	2001-11-20
Method for resource control in parallel environments using program organization and run-time support Grant 5,978,583 - Ekanadham , et al. November 2, 1	1999-11-02

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.