Morarka; Saurabh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Morarka; Saurabh.The latest application filed is for "methods of forming dislocation enhanced strain in nmos and pmos structures".

Company Profile

4.4.9

Morarka; Saurabh - Hillsboro OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Gate-all-around integrated circuit structures including varactors Grant 11,417,781 - Kar , et al. August 16, 2	2022-08-16
Methods of forming dislocation enhanced strain in NMOS and PMOS structures Grant 11,411,110 - Jackson , et al. August 9, 2	2022-08-09
Methods Of Forming Dislocation Enhanced Strain In Nmos And Pmos Structures App 20220238714 - Jackson; Michael ; et al.	2022-07-28
Methods Of Forming Dislocation Enhanced Strain In Nmos And Pmos Structures App 20220059699 - Jackson; Michael ; et al.	2022-02-24
Gate-all-around Integrated Circuit Structures Including Varactors App 20210305436 - KAR; Ayan ; et al.	2021-09-30
Methods of forming dislocation enhanced strain in NMOS structures Grant 11,107,920 - Jackson , et al. August 31, 2	2021-08-31
Field-effect Transistors With Asymmetric Gate Stacks App 20200259018 - A1	2020-08-13
Finfet Varactor Quality Factor Improvement App 20200105747 - LEE; Hyung-Jin ; et al.	2020-04-02
Methods Of Forming Dislocation Enhanced Strain In Nmos Structures App 20190334034 - JACKSON; Michael ; et al.	2019-10-31
Methods of forming dislocation enhanced strain in NMOS structures Grant 10,396,201 - Jackson , et al. A	2019-08-27
Resistance Reduction Under Transistor Spacers App 20180240874 - WEBER; CORY E. ; et al.	2018-08-23
Methods Of Forming Dislocation Enhanced Strain In Nmos Structures App 20160204256 - Jackson; Michael ; et al.	2016-07-14

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