Moore; Charles Roberts

Patent Applications and Registrations

Patent applications and USPTO patent grants for Moore; Charles Roberts.The latest application filed is for "accessibility of graphics processing compute resources".

Company Profile

0.15.4

Moore; Charles Roberts - Saratoga CA
Moore; Charles Roberts - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Accessibility Of Graphics Processing Compute Resources App 20120229481 - McCrary; Rex ; et al.	2012-09-13
Managing load and store operations using a storage management unit with data flow architecture Grant 6,938,148 - Moore , et al. August 30, 2	2005-08-30
Processor and method that predict condition register-dependent conditional branch instructions utilizing a potentially stale condition register value Grant 6,766,442 - Kahle , et al. July 20, 2	2004-07-20
Method and apparatus for utilizing renamed registers based upon a functional or defective operational status of the register Grant 6,748,519 - Moore June 8, 2	2004-06-08
Partitioned issue queue and allocation strategy Grant 6,728,866 - Kahle , et al. April 27, 2	2004-04-27
Shared execution unit in a dual core processor Grant 6,725,354 - Kahle , et al. April 20, 2	2004-04-20
Data flow oriented storage App 20040073775 - Moore, Charles Roberts ; et al.	2004-04-15
Processor and method for separately predicting conditional branches dependent on lock acquisition Grant 6,678,820 - Kahle , et al. January 13, 2	2004-01-13
Converting short branches to predicated instructions Grant 6,662,294 - Kahle , et al. December 9, 2	2003-12-09
Determining successful completion of an instruction by comparing the number of pending instruction cycles with a number based on the number of stages in the pipeline Grant 6,658,555 - Kahle , et al. December 2, 2	2003-12-02
Branch prediction circuit selector with instruction context related condition type determining Grant 6,658,558 - Kahle , et al. December 2, 2	2003-12-02
Assigning a group tag to an instruction group wherein the group tag is recorded in the completion table along with a single instruction address for the group to facilitate in exception handling Grant 6,654,869 - Kahle , et al. November 25, 2	2003-11-25
Microprocessor instruction buffer redundancy scheme Grant 6,625,746 - Moore September 23, 2	2003-09-23
Microprocessor with primary and secondary issue queue Grant 6,609,190 - Kahle , et al. August 19, 2	2003-08-19
Mixed-mode hardware multithreading App 20020156999 - Eickemeyer, Richard James ; et al.	2002-10-24
Hardware for use with compiler generated branch information App 20020073301 - Kahle, James Allan ; et al.	2002-06-13
Method and system for efficient maintenance of data coherency in a multiprocessor system utilizing cache synchronization Grant 5,848,283 - Moore , et al. December 8, 1	1998-12-08
Method and system for processing first and second sets of instructions by first and second types of processing systems Grant 5,724,565 - Dubey , et al. March 3, 1	1998-03-03
Method and system for achieving atomic memory references in a multilevel cache data processing system Grant 5,706,464 - Moore , et al. January 6, 1	1998-01-06

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