Montanini; Pietro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Montanini; Pietro.The latest application filed is for "vertical transport fet with bottom source and drain extensions".

Company Profile

18.48.46

Montanini; Pietro - Albany NY
Montanini; Pietro - Guilderland NY
MONTANINI; Pietro - Yorktown Heights NY
Montanini; Pietro - Milan N/A IT
MONTANINI; Pietro - Milano (MI) IT
MONTANINI; Pietro - Milano IT
Montanini; Pietro - Phoenix AZ
Montanini; Pietro - Melegnano IT
Montanini; Pietro - Hopewell Junction NY
Montanini; Pietro - Cornaredo IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Nanosheet transistor device with bottom isolation Grant 11,387,319 - Xie , et al. July 12, 2	2022-07-12
Robust low-k bottom spacer for VFET Grant 11,201,089 - Niimi , et al. December 14, 2	2021-12-14
Vertical transport FET with bottom source and drain extensions Grant 11,183,583 - Mochizuki , et al. November 23, 2	2021-11-23
Vertical Transport FET with Bottom Source and Drain Extensions App 20210336035 - Mochizuki; Shogo ; et al.	2021-10-28
Vertical Field-effect Transistor Late Gate Recess Process With Improved Inter-layer Dielectric Protection App 20210151583 - XU; Wenyu ; et al.	2021-05-20
Nanosheet Transistor Device With Bottom Isolation App 20210074809 - Xie; Ruilong ; et al.	2021-03-11
Vertical field-effect transistor late gate recess process with improved inter-layer dielectric protection Grant 10,937,890 - Xu , et al. March 2, 2	2021-03-02
Nanosheet transistor with fully isolated source and drain regions and spacer pinch off Grant 10,916,627 - Loubet , et al. February 9, 2	2021-02-09
Vertical Field-effect Transistor Late Gate Recess Process With Improved Inter-layer Dielectric Protection App 20200321448 - XU; Wenyu ; et al.	2020-10-08
Utilizing multilayer gate spacer to reduce erosion of semiconductor Fin during spacer patterning Grant 10,790,393 - Greene , et al. September 29, 2	2020-09-29
Nanosheet Transistor With Fully Isolated Source And Drain Regions And Spacer Pinch Off App 20200303500 - LOUBET; NICOLAS ; et al.	2020-09-24
Robust Low-k Bottom Spacer For Vfet App 20200279780 - NIIMI; HIROKI ; et al.	2020-09-03
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism Grant 10,756,203 - Frougier , et al. A	2020-08-25
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism Grant 10,741,675 - Frougier , et al. A	2020-08-11
Removal of epitaxy defects in transistors Grant 10,699,965 - Greene , et al.	2020-06-30
Dielectric isolation in gate-all-around devices Grant 10,636,694 - Chao , et al.	2020-04-28
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism App 20200044058 - Frougier; Julien ; et al.	2020-02-06
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism App 20200044057 - Frougier; Julien ; et al.	2020-02-06
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism Grant 10,553,705 - Frougier , et al. Fe	2020-02-04
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism Grant 10,546,945 - Frougier , et al. Ja	2020-01-28
Dielectric Isolation In Gate-all-around Devices App 20190393076 - Chao; Robin Hsin Kuo ; et al.	2019-12-26
Dielectric isolation in gate-all-around devices Grant 10,453,736 - Chao , et al. Oc	2019-10-22
Method of forming integrated circuit with gate-all-around field effect transistor and the resulting structure Grant 10,431,663 - Xie , et al. O	2019-10-01
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism App 20190259858 - Frougier; Julien ; et al.	2019-08-22
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism App 20190259857 - Frougier; Julien ; et al.	2019-08-22
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism App 20190259856 - Frougier; Julien ; et al.	2019-08-22
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism Grant 10,388,760 - Frougier , et al. A	2019-08-20
Nanosheet devices with CMOS epitaxy and method of forming Grant 10,366,931 - Xie , et al. July 30, 2	2019-07-30
Method Of Forming Integrated Circuit With Gate-all-around Field Effect Transistor And The Resulting Structure App 20190214473 - Xie; Ruilong ; et al.	2019-07-11
Reducing bending in parallel structures in semiconductor fabrication Grant 10,347,749 - Pranatharthiharan , et al. July 9, 2	2019-07-09
Utilizing Multilayer Gate Spacer To Reduce Erosion Of Semiconductor Fin During Spacer Patterning App 20190172940 - Greene; Andrew M. ; et al.	2019-06-06
Dielectric Isolation In Gate-all-around Devices App 20190109040 - CHAO; ROBIN HSIN KUO ; et al.	2019-04-11
Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterning Grant 10,243,079 - Greene , et al.	2019-03-26
Nanosheet Transistor With Improved Inner Spacer App 20190081155 - XIE; Ruilong ; et al.	2019-03-14
Nanosheet Devices With Cmos Epitaxy And Method Of Forming App 20190019733 - Xie; Ruilong ; et al.	2019-01-17
Utilizing Multilayer Gate Spacer To Reduce Erosion Of Semiconductor Fin During Spacer Patterning App 20190006506 - Greene; Andrew M. ; et al.	2019-01-03
Etch-resistant spacer formation on gate structure Grant 10,109,722 - Xie , et al. October 23, 2	2018-10-23
Nanosheet devices with CMOS epitaxy and method of forming Grant 10,109,533 - Xie , et al. October 23, 2	2018-10-23
Embedded shape sige for strained channel transistors Grant 10,103,245 - Zhang , et al. October 16, 2	2018-10-16
Reducing Bending In Parallel Structures In Semiconductor Fabrication App 20180277663 - Pranatharthiharan; Balasubramanian S. ; et al.	2018-09-27
Etch-resistant Spacer Formation On Gate Structure App 20180254331 - Xie; Ruilong ; et al.	2018-09-06
Methods of forming an isolated nano-sheet transistor device and the resulting device Grant 9,984,936 - Xie , et al. May 29, 2	2018-05-29
Novel Embedded Shape Sige For Strained Channel Transistors App 20170352741 - Zhang; John H. ; et al.	2017-12-07
FinFET spacer formation on gate sidewalls, between the channel and source/drain regions Grant 9,806,078 - Xie , et al. October 31, 2	2017-10-31
Embedded shape sige for strained channel transistors Grant 9,755,051 - Zhang , et al. September 5, 2	2017-09-05
Devices and methods of forming epi for aggressive gate pitch Grant 9,685,384 - Xie , et al. June 20, 2	2017-06-20
Novel Embedded Shape Sige For Strained Channel Transistors App 20160099339 - Zhang; John H. ; et al.	2016-04-07
Embedded shape SiGe for strained channel transistors Grant 9,245,955 - Zhang , et al. January 26, 2	2016-01-26
Precision polysilicon resistors Grant 9,000,564 - Montanini , et al. April 7, 2	2015-04-07
Prevention of faceting in epitaxial source drain transistors Grant 8,987,827 - Montanini , et al. March 24, 2	2015-03-24
Novel Embedded Shape Sige For Nfet Channel Strain App 20150001583 - Zhang; John H. ; et al.	2015-01-01
Bottled Epitaxy In Source And Drain Regions Of Fets App 20140353741 - Montanini; Pietro ; et al.	2014-12-04
Precision Polysilicon Resistors App 20140175609 - Montanini; Pietro ; et al.	2014-06-26
Process for etching trenches in an integrated optical device Grant 8,486,741 - Montanini , et al. July 16, 2	2013-07-16
Deep contacts of integrated electronic devices based on regions implanted through trenches Grant 8,476,143 - Montanini , et al. July 2, 2	2013-07-02
Deep Contacts Of Integrated Electronic Devices Based On Regions Implanted Through Trenches App 20130017676 - MONTANINI; Pietro ; et al.	2013-01-17
Process For Etching Trenches In An Integrated Optical Device App 20120228260 - MONTANINI; Pietro ; et al.	2012-09-13
SOI device with contact trenches formed during epitaxial growing Grant 8,183,098 - Montanini , et al. May 22, 2	2012-05-22
Method of fabrication of plastic film supported single crystal silicon photovoltaic cell structure Grant 8,124,865 - Montanini , et al. February 28, 2	2012-02-28
Deep contacts of integrated electronic devices based on regions implanted through trenches Grant 8,115,314 - Montanini , et al. February 14, 2	2012-02-14
Front-rear contacts of electronics devices with induced defects to increase conductivity thereof Grant 7,999,349 - Montanini , et al. August 16, 2	2011-08-16
Process for manufacturing high-sensitivity accelerometric and gyroscopic integrated sensors, and sensor thus produced Grant RE41,889 - Ferrari , et al. October 26, 2	2010-10-26
Process for manufacturing high-sensitivity accelerometric and gyroscopic integrated sensors, and sensor thus produced Grant RE41,856 - Ferrari , et al. October 26, 2	2010-10-26
Soi Device With Contact Trenches Formed During Epitaxial Growing App 20100075484 - Montanini; Pietro ; et al.	2010-03-25
Coupling structure for optical fibres and process for making it Grant 7,645,076 - Martini , et al. January 12, 2	2010-01-12
SOI device with contact trenches formed during epitaxial growing Grant 7,635,896 - Montanini , et al. December 22, 2	2009-12-22
Folded-gate MOS transistor Grant 7,629,645 - Montanini , et al. December 8, 2	2009-12-08
Process for the singulation of integrated devices in thin semiconductor chips Grant 7,605,015 - Ponza , et al. October 20, 2	2009-10-20
Method for manufacturing a vertical-gate MOS transistor with countersunk trench-gate Grant 7,572,703 - Annese , et al. August 11, 2	2009-08-11
Deep Contacts Of Integrated Electronic Devices Based On Regions Implanted Through Trenches App 20090152733 - Montanini; Pietro ; et al.	2009-06-18
Coupling structure for optical fibres and process for making it App 20090136237 - Martini; Francesco ; et al.	2009-05-28
Front-rear contacts of electronics devices with induced defects to increase conductivity thereof App 20080017949 - Montanini; Pietro ; et al.	2008-01-24
SOI device with contact trenches formed during epitaxial growing App 20070296036 - Montanini; Pietro ; et al.	2007-12-27
Vertical-gate Mos Transistor For High Voltage Applications With Differentiated Oxide Thickness App 20070145474 - Annese; Marco ; et al.	2007-06-28
Process for the singulation of integrated devices in thin semiconductor chips App 20070141809 - Ponza; Anna ; et al.	2007-06-21
Method For Manufacturing A Vertical-gate Mos Transistor With Countersunk Trench-gate App 20070141787 - Annese; Marco ; et al.	2007-06-21
Folded-gate MOS transistor App 20070034895 - Montanini; Pietro ; et al.	2007-02-15
Optoelectronic Module And Manufacturing Method Of Said Module App 20070009212 - Martini; Francesco ; et al.	2007-01-11
Method for manufacturing encapsulated opto-electronic devices and encapsulated device thus obtained Grant 7,141,871 - Mastromatteo , et al. November 28, 2	2006-11-28
Plastic film supported single crystal silicon photovoltaic cell structure and method of fabrication App 20060118164 - Montanini; Pietro ; et al.	2006-06-08
Integrated optical waveguide and process for fabrication App 20060093298 - Montanini; Pietro ; et al.	2006-05-04
Process for etching trenches in an integrated optical device App 20060068554 - Montanini; Pietro ; et al.	2006-03-30
Method for manufacturing encapsulated opto-electronic devices and encapsulated device thus obtained App 20050093013 - Mastromatteo, Ubaldo ; et al.	2005-05-05
Wave guide manufactoring method and wave guide App 20040152020 - Montanini, Pietro ; et al.	2004-08-05
Method for manufacturing an SOI wafer App 20020094665 - Villa, Flavio ; et al.	2002-07-18
Method for manufacturing integrated structures including removing a sacrificial region Grant 6,395,618 - Vergani , et al. May 28, 2	2002-05-28
Production method for integrated angular speed sensor device Grant 6,387,725 - Ferrari , et al. May 14, 2	2002-05-14
Production Method For Integrated Angular Speed Sensor Device App 20020022291 - Ferrari, Paolo ; et al.	2002-02-21
Method for manufacturing integrated structures including removing a sacrificial region App 20010026951 - Vergani, Paolo ; et al.	2001-10-04
Integrated angular speed sensor device and production method thereof Grant 6,209,394 - Ferrari , et al. April 3, 2	2001-04-03
Process for manufacturing high-sensitivity capacitive and resonant integrated sensors, particularly accelerometers and gyroscopes, and sensors made therefrom Grant 6,090,638 - Vigna , et al. July 18, 2	2000-07-18

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