loadpatents
name:-0.021544933319092
name:-0.028908967971802
name:-0.0080649852752686
Mondal; Krishnendu Patent Filings

Mondal; Krishnendu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mondal; Krishnendu.The latest application filed is for "built-in self-test (bist) engine configured to store a per pattern based fail status in a pattern mask register".

Company Profile
8.22.20
  • Mondal; Krishnendu - Bangalore IN
  • Mondal; Krishnendu - Burlington VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register
Grant 11,295,829 - Busi , et al. April 5, 2
2022-04-05
Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register
Grant 10,971,243 - Busi , et al. April 6, 2
2021-04-06
Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register
Grant 10,692,584 - Busi , et al.
2020-06-23
Simultaneous scan chain initialization with disparate latches
Grant 10,658,062 - Agrawal , et al.
2020-05-19
Simultaneous scan chain initialization with disparate latches
Grant 10,586,606 - Agrawal , et al.
2020-03-10
Built-in Self-test (bist) Engine Configured To Store A Per Pattern Based Fail Status In A Pattern Mask Register
App 20200075119 - BUSI; Aravindan J. ;   et al.
2020-03-05
Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register
Grant 10,553,302 - Busi , et al. Fe
2020-02-04
Simultaneous Scan Chain Initialization With Disparate Latches
App 20200005883 - Agrawal; Mitesh ;   et al.
2020-01-02
Built-in Self-test (bist) Engine Configured To Store A Per Pattern Based Fail Status In A Pattern Mask Register
App 20190378587 - BUSI; Aravindan J. ;   et al.
2019-12-12
Simultaneous Scan Chain Initialization With Disparate Latches
App 20190156907 - Agrawal; Mitesh ;   et al.
2019-05-23
Simultaneous scan chain initialization with disparate latches
Grant 10,199,121 - Agrawal , et al. Fe
2019-02-05
Simultaneous Scan Chain Initialization With Disparate Latches
App 20180294042 - Agrawal; Mitesh ;   et al.
2018-10-11
Simultaneous Scan Chain Initialization With Disparate Latches
App 20180294041 - Agrawal; Mitesh ;   et al.
2018-10-11
Simultaneous scan chain initialization with disparate latches
Grant 10,096,377 - Agrawal , et al. October 9, 2
2018-10-09
Simultaneous scan chain initialization with disparate latches
Grant 10,026,498 - Agrawal , et al. July 17, 2
2018-07-17
Failure analysis and repair register sharing for memory BIST
Grant 10,014,074 - Mondal , et al. July 3, 2
2018-07-03
Built-in Self-test (bist) Engine Configured To Store A Per Pattern Based Fail Status In A Pattern Mask Register
App 20180061509 - BUSI; Aravindan J. ;   et al.
2018-03-01
Built-in Self-test (bist) Engine Configured To Store A Per Pattern Based Fail Status In A Pattern Mask Register
App 20180053566 - BUSI; Aravindan J. ;   et al.
2018-02-22
Built-in-self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register
Grant 9,881,694 - Busi , et al. January 30, 2
2018-01-30
Programmable counter to control memory built in self-test
Grant 9,859,019 - Hanagandi , et al. January 2, 2
2018-01-02
Failure Analysis And Repair Register Sharing For Memory Bist
App 20170309349 - MONDAL; Krishnendu ;   et al.
2017-10-26
Built-in-self-test (BIST) test time reduction
Grant 9,773,570 - Gorman , et al. September 26, 2
2017-09-26
Built-in self-test (BIST) circuit and associated BIST method for embedded memories
Grant 9,761,329 - Busi , et al. September 12, 2
2017-09-12
Built-in self-test (BIST) circuit and associated BIST method for embedded memories
Grant 9,715,942 - Busi , et al. July 25, 2
2017-07-25
Built-in Self-test (bist) Circuit And Associated Bist Method For Embedded Memories
App 20170110205 - Busi; Aravindan J. ;   et al.
2017-04-20
Built-in Self-test (bist) Engine
App 20170018313 - BUSI; Aravindan J. ;   et al.
2017-01-19
Built-in Self-test (bist) Circuit And Associated Bist Method For Embedded Memories
App 20160365156 - Busi; Aravindan J. ;   et al.
2016-12-15
Decreasing power supply demand during BIST initializations
Grant 8,918,690 - Hanagandi , et al. December 23, 2
2014-12-23
System and method of reducing test time via address aware BIST circuitry
Grant 8,914,688 - Belansek , et al. December 16, 2
2014-12-16
Stacked chip module with integrated circuit chips having integratable built-in self-maintenance blocks
Grant 8,872,322 - Gorman , et al. October 28, 2
2014-10-28
Stacked chip module with integrated circuit chips having integratable and reconfigurable built-in self-maintenance blocks
Grant 8,853,847 - Gorman , et al. October 7, 2
2014-10-07
Built-in-self-test (bist) Test Time Reduction
App 20140258797 - Gorman; Kevin W. ;   et al.
2014-09-11
Decreasing Power Supply Demand During Bist Initializations
App 20140189448 - Hanagandi; Deepak I. ;   et al.
2014-07-03
System And Method Of Reducing Test Time Via Address Aware Bist Circuitry
App 20140149810 - Belansek; George M. ;   et al.
2014-05-29
Stacked Chip Module With Integrated Circuit Chips Having Integratable And Reconfigurable Built-in Self-maintenance Blocks
App 20140110710 - Gorman; Kevin W. ;   et al.
2014-04-24
Stacked Chip Module With Integrated Circuit Chips Having Integratable Built-in Self-maintenance Blocks
App 20140110711 - Gorman; Kevin W. ;   et al.
2014-04-24
Self-test architecture to implement data column redundancy in a RAM
Grant 6,928,377 - Eustis , et al. August 9, 2
2005-08-09
Multiple on-chip test runs and repairs for memories
Grant 6,922,649 - Mondal , et al. July 26, 2
2005-07-26
Multiple On-chip Test Runs And Repairs For Memories
App 20050138513 - Mondal, Krishnendu ;   et al.
2005-06-23
Self-test architecture to implement data column redundancy in a RAM
App 20050055173 - Eustis, Steven M. ;   et al.
2005-03-10
Method of electrically blowing fuses under control of an on-chip tester interface apparatus
Grant 6,768,694 - Anand , et al. July 27, 2
2004-07-27
Method Of Electrically Blowing Fuses Under Control Of An On-chip Tester Interface Apparatus
App 20040066695 - Anand, Darren L. ;   et al.
2004-04-08

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